PI6C4911510-05

PI6C4911510-05 2.5V/3.3V 1.5GHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer with Sync OE Features ÎÎFMAX < 1.5GHz ÎÎ10 pairs of differential LVPECL/ ECL outputs ÎÎLow additive jitter, < 0.03ps (typ) ÎÎSelectable differential input pairs with single ended input option ÎÎInput CLK accepts: LVPECL, LVDS, CML, SSTL input level ÎÎOutput skew: 55ps (max) ÎÎOperating Temperature: -40oC to 85oC ÎÎECL mode operating voltage range VDD/ VDDO = 0V, VEE = -3.6V to -2.375V ÎÎPower supply: 3.3V ±10% or 2.5V ±5% ÎÎPackaging (Pb-free & Green), 32-pin TQFP available Description The PI6C4911510-05 is a high-performance low-skew 1-to-10 LVPECL/ECLfanout buffer. The PI6C4911510-05 features two selectable differentialclockinputsandtranslatestotenLVPECL/ECLoutputs. The CLK inputs accept LVPECL, LVDS, CML and SSTL signals. PI6C4911510-05 is ideal for clock distribution applications such as providing fanout for low noise Pericom oscillators. Block Diagram CLK0 nCLK0 CLK1 nCLK1 CLK_SEL SYNC_OE 0 1 D Q LE 13-0151 Q0+ Q0Q1+ Q1Q2+ Q2- Q3+ Q3- Q4+ Q4- Q5+ Q5- Q6+ Q6- Q7+ Q7- Q8+ Q8- Q9+ Q9- Pin Configuration VDD 1 CLK_SEL 2 CLK0 3 nCLK0 4 SYNC_OE 5 CLK1 6 nCLK1 7 VEE 8 VDDO 9 Q9- 10 Q9+ 11 Q8- 12 Q8+ 13 Q7- 14 Q7+ 15 VDDO 16 32 31 30 29 28 27 26 25 VDDO Q0+ Q0Q1+ Q1Q2+ Q2VDDO 24 Q3+ 23 Q322 Q4+ 21 Q420 Q5+ 19 Q518 Q6+ 17 Q6- 1 PI6C4911510-05 Rev C 10/09/2013 PI6C4911510-05 2.5V/3.3V 1.5GHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer w/ Sync OE Pin Description Pin # 1 ...