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LC87FBL08A Dataheets PDF



Part Number LC87FBL08A
Manufacturers ON Semiconductor
Logo ON Semiconductor
Description 8-bit 1-chip Microcontroller
Datasheet LC87FBL08A DatasheetLC87FBL08A Datasheet (PDF)

Ordering number : ENA1955 LC87FBL08A CMOS IC 8K-byte FROM and 256-byte RAM integrated 8-bit 1-chip Microcontroller http://onsemi.com Overview The LC87FBL08A is an 8-bit microcomputer that, centered around a CPU running at a minimum bus cycle time of 83.3ns, integrates on a single chip a number of hardware features such as 8K-byte flash ROM (On-boardprogrammable), 256-byte RAM, an On-chip-debugger, sophisticated 16-bit timers/counters (may be divided into 8-bit timers), a 16-bit timer/counter (.

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Ordering number : ENA1955 LC87FBL08A CMOS IC 8K-byte FROM and 256-byte RAM integrated 8-bit 1-chip Microcontroller http://onsemi.com Overview The LC87FBL08A is an 8-bit microcomputer that, centered around a CPU running at a minimum bus cycle time of 83.3ns, integrates on a single chip a number of hardware features such as 8K-byte flash ROM (On-boardprogrammable), 256-byte RAM, an On-chip-debugger, sophisticated 16-bit timers/counters (may be divided into 8-bit timers), a 16-bit timer/counter (may be divided into 8-bit timers/counters or 8-bit PWMs), two 8-bit timers with a prescaler, a base timer serving as a time-of-day clock, an asynchronous/synchronous SIO interface, two 12-bit PWM channels, a 12-bit/8-bit 11-channel AD converter, a system clock frequency divider, an internal reset and a 17-source 9-vector interrupt feature. Features Flash ROM • Capable of On-board programming with wide range (2.7 to 5.5V) of voltage source. • Block-erasable in 128 byte units • Writable in 2-byte units • 8192 × 8 bits RAM • 256 × 9 bits Minimum Bus Cycle • 83.3ns (12MHz at VDD=2.7V to 5.5V) Note: The bus cycle time here refers to the ROM read speed. * This product is licensed from Silicon Storage Technology, Inc. (USA). Semiconductor Components Industries, LLC, 2013 May, 2013 Ver.1.00 52511HKIM 20110419-S00003 No.A1955-1/28 Minimum Instruction Cycle Time • 250ns (12MHz at VDD=2.7V to 5.5V) LC87FBL08A Ports • Normal withstand voltage I/O ports Ports I/O direction can be designated in 1-bit units Ports I/O direction can be designated in 4-bit units • Dedicated oscillator ports/input ports • Reset pin • Power pins 17 (P1n, P20, P21,P30, P31, P70 to P73, CF2/XT2) 8 (P0n) 1 (CF1/XT1) 1 (RES) 3 (VSS1, VSS2, VDD1) Timers • Timer 0: 16-bit timer/counter with a capture register. Mode 0: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register) × 2 channels Mode 1: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register) + 8-bit counter (with an 8-bit capture register) Mode 2: 16-bit timer with an 8-bit programmable prescaler (with a 16-bit capture register) Mode 3: 16-bit counter (with a 16-bit capture register) • Timer 1: 16-bit timer/counter that supports PWM/toggle outputs Mode 0: 8-bit timer with an 8-bit prescaler (with toggle outputs) + 8-bit timer/ counter with an 8-bit prescaler (with toggle outputs) Mode 1: 8-bit PWM with an 8-bit prescaler × 2 channels Mode 2: 16-bit timer/counter with an 8-bit prescaler (with toggle outputs) (toggle outputs also possible from the lower-order 8 bits) Mode 3: 16-bit timer with an 8-bit prescaler (with toggle outputs) (The lower-order 8 bits can be used as PWM) • Timer 6: 8-bit timer with a 6-bit prescaler (with toggle outputs) • Timer 7: 8-bit timer with a 6-bit prescaler (with toggle outputs) • Base timer 1) The clock is selectable from the subclock (32.768kHz crystal oscillation), system clock, and timer 0 prescaler output. 2) Interrupts are programmable in 5 different time schemes SIO • SIO1: 8-bit asynchronous/synchronous serial interface Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clocks) Mode 1: Asynchronous serial I/O (half-duplex, 8 data bits, 1 stop bit, 8 to 2048 tCYC baudrates) Mode 2: Bus mode 1 (start bit, 8 data bits, 2 to 512 tCYC transfer clocks) Mode 3: Bus mode 2 (start detect, 8 data bits, stop detect) AD Converter: 12 bits/8 bits × 11 channels • 12 bits/8 bits AD converter resolution selectable PWM: Multifrequency 12-bit PWM × 2 channels Remote Control Receiver Circuit (sharing pins with P73, INT3, and T0IN) • Noise rejection function (noise filter time constant selectable from 1 tCYC, 32 tCYC, and 128 tCYC) Clock Output Function • Capable generating clock outputs with a frequency of 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64 of the source clock selected as the system clock. • Capable generating the source clock for the subclock Watchdog Timer • Capable generating an internal reset on an overflow of a timer running on the low-speed RC oscillator clock or subclock. • Operating mode at standby is selectable from 3 modes (continue counting/stop operation/stop counting with a count value held). No.A1955-2/28 LC87FBL08A Interrupts • 17 sources, 9 vector addresses 1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests of the level equal to or lower than the current interrupt are not accepted. 2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector address takes precedence. No. Vector Address Level Interrupt Source 1 00003H X or L INT0 2 0000BH X or L INT1 3 00013H H or L INT2/T0L/INT4 4 0001BH H or L INT3/INT5/base timer 5 00023H H or L T0H 6 0002BH H or L T1L/T1H 7 00033H H or L None 8.


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