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TOSHIBA
TC551001BPL/BFL/BFTL/BTRL-70L/85L
SILICON GATE CMOS
131,072 WORD x 8 BIT STATIC RAM
Description
The TC551001BPL is a 1,048,576 bits static random access memory organized as 131,072 words by 8 bits using CMOS technology, and operated from a single 5V power supply. Advanced circuit techniques provide both high speed and low power features with an operating current of 5mA/MHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2µA typically. The TC551001BPL has three control inputs. Chip Enable inputs (CE1, CE2) allow for device selection and data retention control, while an Output Enable input (OE) provides fast memory access. The TC551001BPL is suitable for use in microprocessor application systems where high speed, low power, and battery backup are required.
The TC551001BPL is offered in a standard dual-in-line 32-pin plastic package, a small outline plastic package, and a thin small outline plastic package (forward, reverse type).
Features
Pin Connection (Top View)
• Low power dissipation: 27.5mW/MHz (typ.)
• Standby current:
4µA (max.) at Ta = 25°C
• 5V single power supply
• Access time (max.)
TC551001BPL/BFL/BFTL/BTRL
-70L -85L
Access Time CE1 Access Time CE2 Access Time OE Access Time
70ns 70ns 70ns 35ns
85ns 85ns 85ns 45ns
• Power down feature:
CE1, CE2
• Data retention supply voltage: 2.0 ~ 5.5V
• Inputs and outputs directly TTL compatible
• Package
TC551001BPL : DIP32-P-600
Pin Names
TC551001BFL TC551001BFTL TC551001BTRL
: SOP32-P-525 : TSOP32-P-0820 : TSOP32-P-0820A
A0 ~ A16 Address Inputs
R/W Read/Write Control Input
OE Output Enable Input
CE1, CE2 Chip Enable Inputs
I/O1 ~ I/O8 Data Input/Output
VDD GND
Power (+5V) Ground
N.C. No Connection
TSOP Pinout
PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
PIN NAME A11 A9 A8 A13 R/W CE2 A15 VDD NC A16 A14 A12 A7 A6 A5 A4 PIN NO. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
PIN NAME A3 A2 A1 A0 I/O1 I/O2 I/O3 GND I/O4 I/O5 I/O6 I/O7 I/O8 CE1 A10 OE
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Static RAM
SR01020795
Operating Mode OPERATION MODE
Read Write Output Deselect
Standby
* H or L
CE1 CE2
LH LH LH H* *L
Maximum Ratings
SYMBOL
ITEM
VDD VIN VI/O PD TSOLDER TSTRG TOPR
Power Supply Voltage Input Voltage Input and Output Voltage Power Dissipation Soldering Temperature (10s) Storage Temperature Operating Temperature
* -3.0V at pulse width of 50ns Max ** SOP
OE R/W I/O1 ~ I/O8 POWER
L
H
DOUT
IDDO
* L DIN IDDO
H
H
High-Z
IDDO
*
*
High-Z
IDDS
*
*
High-Z
IDDS
RATING
-0.3 ~ 7.0 -0.3* ~ 7.0 -0.5 ~ VDD + 0.5 1.0/0.6**
260 -55 ~ 150
0 ~ 70
UNIT
V V V W °C °C °C
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SR01020795
Static RAM
TC551001BPL/BFL/BFTL/BTRL-70L/85L
DC Recommended Operating Conditions
SYMBOL
PARAMETER
VDD Power Supply Voltage VIH Input High Voltage VIL Input Low Voltage VDH Data Retention Supply Voltage
* -3.0V at pulse width of 50ns Max.
MIN.
4.5 2.2 -0.3* 2.0
TYP. MAX. UNIT
5.0 5.5 – VDD + 0.3 – 0.8 – 5.5
V
DC and Operating Characteristics (Ta = 0 ~ 70ºC, VDD = 5V±10%)
SYMBOL
PARAMETER
TEST CONDITION
MIN. TYP. MAX. UNIT
ILI Input Leakage Current ILO Output Leakage Current IOH Output High Current IOL Output Low Current
IDDO1
Operating Current IDDO2
IDDS1 IDDS2(1) Standby Current
VIN = 0 ~ VDD
– – ±1.0 µA
CE1 = VIH or CE2 = VIL or R/W = VIL or OE = VIH, VOUT = 0 ~ VDD
– – ±1.0 µA
VOH = 2.4V
-1.0 –
– mA
VOL = 0.4V
4.0 –
– mA
CE1 = VIL and CE2 = VIH
Min. – – 70
and R/W = VIH, IOUT = 0mA
tcycle
1µs
–
–
20
Other Inputs = VIH/VIL
CE1 = 0.2V and
CE2 = VDD - 0.2V R/W = VDD - 0.2V IOUT = 0mA Other Inputs
= VDD - 0.2V/0.2V
Min. – – 60 mA
tcycle
1µs
–
–
10
CE1 = VIH or CE2 = VIL
– – 3 mA
CE1 = VDD - 0.2V or CE2 = 0.2V
VDD = 2.0V ~ 5.5V
Ta = 0 ~ 70°C
–
–
30
Ta = 25°C
µA –2 4
Note: (1) In standby mode with CE1 ≥ VDD - 0.2V, these specification limits are guaranteed under the condition of CE2 ≥ VDD - 0.2V or CE2 ≤ 0.2V.
Capacitance (Ta = 25ºC, f = 1MHz)
SYMBOL
PARAMETER
TEST CONDITION
CIN Input Capacitance COUT Output Capacitance
VIN = GND VOUT = GND
Note: This parameter is periodically sampled and is not 100% tested.
MAX. 10 10
UNIT pF
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TC551001BPL/BFL/BFTL/BTRL-70L/85L
Static RAM
AC Characteristics (Ta = 0 ~ 70°C, VDD = 5V±10%)
Read Cycle
SYMBOL
PARAMETER
tRC tACC tCO1 tCO2 tOE tCOE tOEE tOD tODO tOH
Read Cycle Time Address Access Time CE1 Access Time CE2 Access Time Output Enable to Output in Valid Chip Enable (CE1, CE2) to Output in Low-Z Output Enable to Output in Low-Z Chip Enable (CE1, CE2) to Output in High-Z Output Enable to Output in High-Z Output Data Hold Time
.