Quadruple S-R Latches
Standard Products
UT54ACS279/UT54ACTS279
Quadruple S-R Latches
Datasheet November 2010 www.aeroflex.com/logic
FEATURES ...
Description
Standard Products
UT54ACS279/UT54ACTS279
Quadruple S-R Latches
Datasheet November 2010 www.aeroflex.com/logic
FEATURES 1.2μ CMOS
- Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package
- 16-pin DIP - 16-lead flatpack UT54ACS279- SMD 5962-96580 UT54ACTS279 - SMD 5962-96581
DESCRIPTION
The UT54ACS279 and the UT54ACTS279 contain four basic S-R flip-flop latches. Under conventional operation, the S-R inputs are normally held high. When the S input is pulsed low, the Q output will be set high. When R is pulsed low, the Q output will be reset low. If the S-R inputs are taken low simultaneously, the Q output is unpredictable.
The devices are characterized over full military temperature range of -55°C to +125°C.
FUNCTION TABLE
INPUTS SR HH LH HL LL
OUTPUT Q Q0 H L H1
Note: 1. This configuration is nonstable. It may not persist when the S and R inputs
return to their inactive (high) level.
LOGIC DIAGRAM
(LATCHES 1 & 3) R
(LATCHES 2 & 4) R
PINOUTS
1R 1S1 1S2 1Q 2R
2S 2Q VSS
16-Pin DIP Top View
1R 1 16 VDD 1S1 2 15 4S
1S2 3 14 4R
1Q 4 13 4Q
2R 5 12 3S2
2S 6 11 3S1
2Q 7 10 3R
VSS 8
9 3Q
16-Lead Flatpack Top View
1 16 2 15 3 14 4 13 5 12 6 11 7 10 89
VDD 4S 4R 4Q 3S2 3S1 3R 3Q
LOGIC SYMBOL
(1) 1R
(2) 1S1
(3) 1S2
(5) 2R
(6) 2S
(10) 3R
(11) 3S1
(12) 3S2
(14) 4R
(15) 4S
R S1 S1
R S2 R S3 S3
R S4
(4) 1Q
(7) 2Q (9)
3Q (13)
4Q
Note: 1. Logic symbol in accordance with ANSI/IEEE standard 91-198...
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