Dual 4-Input NAND Gates
UT54ACTS20E
Dual 4-Input NAND Gates
December 2014 www.aeroflex.com/Logic Advanced Datasheet
FEATURES
• 0.6μm CRH CMOS ...
Description
UT54ACTS20E
Dual 4-Input NAND Gates
December 2014 www.aeroflex.com/Logic Advanced Datasheet
FEATURES
0.6μm CRH CMOS Process
- Latchup immune
High speed Low power consumption Wide power supply operating range of 3.0V to 5.5V Available QML Q or V processes 14-lead flatpack UT54ACTS20E - SMD 5962-96527
DESCRIPTION
The UT54ACTS20E are dual 4-input NAND gates. The circuits perform the Boolean functions Y = A⋅B⋅C⋅D or Y = A+B+C+D in positive logic.
The device is characterized over full military temperature range of -55°C to +125°C.
FUNCTION TABLE
INPUTS
OUTPUT
ABCDY
HHHH L
L XXXH
X L XXH
XX L XH
XXXLH
LOGIC SYMBOL
(1) A1
(2) B1
(4) C1
(5) D1
& (6) Y1
(9) A2
(10) B2
(12) C2
(13) D2
(8) Y2
Note: 1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC Publication 617-12.
.
PINOUT
A1 B1 NC C1 D1 Y1 VSS
14-Lead Flatpack Top View
1 14 2 13 3 12 4 11 5 10 69 78
VDD D2 C2 NC B2 A2 Y2
LOGIC DIAGRAM
A1 B1 C1 Y1 D1
A2 B2 C2 Y2 D2
36-00-04-003 Ver. 1.0.0
1 Aeroflex Microelectronics Solutions - HiRel
OPERATIONAL ENVIRONMENT 1
PARAMETER Total Dose
SEU Threshold 2 SEL Threshold Neutron Fluence
LIMIT 1.0E6 108 120 1.0E14
Notes: 1. Logic will not latchup during radiation exposure within the limits defined in the table. 2. Device storage elements are immune to SEU affects.
UNITS rads(Si) MeV-cm2/mg MeV-cm2/mg n/cm2
ABSOLUTE MAXIMUM RATINGS
SYMBOL VDD VI/O TSTG TJ TLS ΘJC II PD2
PARAMETER Supply voltage Voltage any pin Storage Temperatur...
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