UT54ACTS240

Standard Products UT54ACS240/UT54ACTS240 Octal Buffers & Line Drivers, Inverted Three-State Outputs Datasheet November 2010 www.aeroflex.com/logic FEATURES ‰ Three-state outputs drive bus lines or buffer memory address registers ‰ 1.2μ CMOS - Latchup immune ‰ High speed ‰ Low power consumption ‰ Single 5 volt supply ‰ Available QML Q or V processes ‰ Flexible package - 20-pin DIP - 20-lead flatpack ‰ UT54ACS240 - SMD 5962-96568 ‰ UT54ACTS240 - SMD 5962-96569 DESCRIPTION The UT54ACS240 and the UT54ACTS240 are inverting octal buffer and line drivers which improve the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The devices are characterized over full military temperature range of -55°C to +125°C. FUNCTION TABLE INPUTS OUTPUT 1G, 2G A Y L LH LHL HXZ PINOUTS 1G 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 VSS LOGIC SYMBOL 1G (1) (2) 1A1 (4) 1A2 (6) 1A3 (8) 1A4 EN (18) 1Y1 (16) 1Y2 (14) 1Y3 (12) 1Y4 (19) 2G EN (11) 2A1 (13) 2A2 (15) 2A3 2A4 (17) (9) 2Y1 (7) 2Y2 (5) 2Y3 (3) 2Y4 Note: 1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 1 20-Pin DIP Top View 1G 1 20 VDD 1A1 2 19 2G 2Y4 3 18 1Y1 1A2 4 17 2A4 2Y3 5 16 1Y2 1A3 6 15 2A3 2Y2 7 14 1Y3 1A4 8 13 2A2 2Y1 9 12 1Y4 VSS 10 11 2A1 20-Lead Flatpack Top View 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VDD 2G 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 LOGIC DIAGRAM 1G (1) 1A1 (2) 1A2 (4) (6) 1A3 1A4 (8) (18) 1Y1 ...