STP413D

STP413D P Channel Enhancement Mode MOSFET -12.0A DESCRIPTION STP413D is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. The STP413D has been designed specially to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed. PIN CONFIGURATION (D-PAK) TO-252 TO-251 FEATURE l -40V/-12.0A, RDS(ON) = 36mΩ (Typ.) @VGS = -10V l -40V/-8.0A, RDS(ON) = 52mΩ @VGS =-4.5V l Super high density cell design for extremely low RDS(ON) l Exceptional on-resistance and maximum DC current capability l TO-252,TO-251 package design PART MARKING Y：Year Code A：Perduce Code Q：Process Code STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com Copyright © 2009, Stanson Corp. STP413D 2009. V1 STP413D P Channel Enhancement Mode MOSFET -12.0A ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted ) Parameter Symbol Typical Drain-Source Voltage VDSS -40 Gate-Source Voltage Continuous Drain Current (TJ=150℃) Pulsed Drain Current TA=25℃ TA=70℃ VGSS ID IDM ±20 -12.0 -10.0 -30 Continuous Source Current (Diode Conduction) Power Dissipation TA=25℃ TA=70℃ Operation Junction Temperature IS PD TJ -12 50 25 150 Storgae Temperature Range TSTG -55/150 Thermal Resistance-Junction to Ambient RθJA 60 Unit V V A A A W ℃ ℃ ℃/W STAN...