If the negative current of the internal inductor reaches -2.5A, the
module enters negative overcurrent protection. At this point, all
switching stops and the module enters tri-state mode while the
pull-down MOSFET discharges the output until it reaches normal
regulation voltage, then the module restarts.
There are two independent power-good signals for each of the
two outputs via the FB pins. PG1 monitors the output Channel 1
and PG2 monitors the output Channel 2. When powering up, the
open-collector power-on reset output holds low for about 1ms
after VOUT reaches within ±8% of the preset voltage. The PG pins
do not require a pull-up resistor.
UVLO (Undervoltage Lockout)
When the input voltage is below the Undervoltage Lockout
(UVLO) threshold, the module is disabled. The maximum UVLO
threshold is 2.85V.
The enable (EN) input allows the user to control the turning on or
off of the module for purposes such as power-up sequencing.
Each channel of the ISL8203M can be turned on or off
independently through the EN pins. Once the module is enabled,
there is typically a 600µs delay for waking up the bandgap
reference, then the soft start-up begins.
The ISL8203M employs an internal digital soft-start circuitry
which minimizes input inrush current during the start-up. The
soft-start circuitry outputs a ramp reference to both the voltage
loop and the current loop. The two ramps limit the inductor
current rising speed as well as the output voltage rising speed so
that the output voltage rises in a controlled fashion. At the
beginning of the soft-start internal, when the voltage on the FB
pin is less than 0.5V, the PWM oscillator frequency is forced to
half of the normal frequency. During the soft-start, the module
cannot sink current, behaving as in diode emulated mode for the
If SS pin is tied to VIN, the soft-start time is an internally fixed
1.5ms. For parallel current sharing mode operation, connect a
capacitor CSS from SS to SGND. CSS should not be larger than
33nF. This capacitor along with the internal current source of 5µA
sets the soft-start time tSS, which can be calculated as shown in
tSSms = 0.16 CSSnF
When a transition to shutdown mode occurs, or the output
undervoltage fault latch is set, the module’s output discharges to
PGND through an internal 100Ω switch.
The internal power MOSFETs are optimize for best efficiency. The
ON-resistance for the P-MOSFET is typically 50mΩ and the
ON-resistance for the N-MOSFET is typically 50mΩ.
100% Duty Cycle Operation
The ISL8203M offers 100% duty cycle operation. When the input
voltage drops to a level that the ISL8203M can no longer
maintain the regulation at the output, the module completely
turns on the P-MOSFET. The maximum dropout voltage under the
100% duty-cycle operation is the product of the load current and
the ON-resistance of the P-MOSFET.
The ISL8203M offers built-in over-temperature protection. When
the junction temperature reaches +150°C, the module is
completely shut down. As the temperature drops to +125°C, the
ISL8203M resumes operation by stepping through a soft-start.
Programming the Output Voltage
The output voltage of the module is programmed by an external
resistor divider between VOUT, FB and SGND pins, as shown in
Figure 21. The output voltage can be calculated as shown in
• RFBTOP is the top feedback resistor
• RFBBOT is the bottom feedback resistor
The top resistor is typically a 100kΩ value, and a 1800pF
capacitor is recommended to be connected in parallel if the
output capacitors are all ceramic capacitors or bulk capacitors
with low ESR (equivalent series resistance). The value of the
bottom resistor for different output voltages is shown in Table 1.
TABLE 1. VALUE OF BOTTOM RESISTOR FOR DIFFERENT OUTPUT
VOLTAGES (VOUT vs RFBBOT)
100 1.0 402
100 1.2 200
100 1.5 113
100 1.8 80.6
100 2.5 47.5
100 3.3 32.4
Please note that the output voltage accuracy is also dependent
on the resistor accuracy of RFBTOP and RFBBOT. The user needs
to select high accuracy resistors (i.e., 0.5%) in order to achieve
the overall output accuracy.
Input Capacitor Selection
Low Equivalent Series Resistance (ESR) ceramic capacitance is
recommended to reduce input voltage ripple and decouple
between the VIN and PGND of each channel. This capacitance
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May 12, 2016