Pin Descriptions (Continued)
Voltage setting pin. The output voltage VOUT1 is set by an external resistor divider connected to FB1. Refer to
“Programming the Output Voltage” on page 12.
Synchronization pin. Connect to logic high or input voltage VIN for non-use. Connect to an external function generator
for external synchronization. Negative edge trigger. Do not leave this pin floating. Do not tie this pin low (or to PGND).
Control signal ground. Connect to PGND under the module on the top layer. Make sure to have only two connect
locations between SGND and PGND to avoid noise coupling. See “PCB Layout Recommendation” on page 14.
(Notes 1 2, 3)
-40 to +85
23 Ld QFN
1. Add “-T” suffix for 1k unit or “-T7A” suffix for 250 unit tape and reel options. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see product information page for ISL8203M. For more information on MSL, please see Technical Brief
Submit Document Feedback
May 12, 2016