1:4 HCSL PCIe Buffer
Features
ÎÎ1:4 HCSL clock buffer ÎÎPCIe® Gen 1, 2 and 3 compliant ÎÎSelectable reference inputs ÎÎCycle-to-Cycle Jitter ...
Description
Features
ÎÎ1:4 HCSL clock buffer ÎÎPCIe® Gen 1, 2 and 3 compliant ÎÎSelectable reference inputs ÎÎCycle-to-Cycle Jitter <70ps ÎÎOutput-to-Output Skew <35ps ÎÎ3.3V supply voltage ÎÎTSSOP-20 package ÎÎIndustrial Temperature
Applications
ÎÎServers ÎÎEmbedded computing systems ÎÎNetworking systems
Block Diagram
OE
SRCIN1 SRCIN1#
SRCIN2 SRCIN2#
REFSEL
PD#
PI6C557-06
1:4 HCSL PCIe® Buffer
Description
The PI6C557-06 is a high performance PCIe® buffer with four
HCSL outputs compliant to PCIe® Gen 1, 2 and 3 standards. The
device has selectable reference inputs to provide flexibility in system design.
Pin Configuration
CLK0 CLK0#
CLK1 CLK1#
CLK2 CLK2#
CLK3 CLK3#
REFSEL VDDIN
SRCIN1 SRCIN1#
PD# SRCIN2 SRCIN2#
OE GND IRef
1 2 3 4 5 6 7 8 9 10
20 CLK0 19 CLK0# 18 CLK1 17 CLK1# 16 GND 15 VDDOUT 14 CLK2 13 CLK2# 12 CLK3 11 CLK3#
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11-0051
1
www.pericom.com
P-0.1
09/15/10
PI6C557-06
1:4 HCSL PCIe Buffer
Function Table
REFSEL
0 1
INPUT Selected
SRCIN2 / SRCIN2# SRCIN1 / SRCIN1#
Pin Description
Pin #
1 2 3, 4
Pin
REFSEL VDDIN SRCIN1, SRCIN1#
5 PD#
6, 7 SRCIN2, SRCIN2#
8 OE
9,16 10 11,12 13,14 15 17, 18 19, 20
GND IRef CKL3#, CLK3 CKL2#, CLK2 VDDOUT CKL1#, CLK1 CKL0#, CLK0
Type Input Power Input
Input
Input
Input
Power Input Output Output Power Output Output
Description
Internal pull up. “0” select SRCIN2/2#; “1” selects SRCIN1/1#. 3.3V for input buffer HCSL Input 1 Power Down mode. “0” is “power down”, “1” is no...
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