UT54ACS54

Standard Products UT54ACS54/UT54ACTS54 4-Wide AND-OR-INVERT Gates Datasheet November 2010 www.aeroflex.com/logic FEATURES ‰ 1.2μ CMOS - Latchup immune ‰ High speed ‰ Low power consumption ‰ Single 5 volt supply ‰ Available QML Q or V processes ‰ Flexible package - 14-pin DIP - 14-lead flatpack ‰ UT54ACS54 - SMD 5962-96532 ‰ UT54ACTS54 - SMD 5962-96533 DESCRIPTION The UT54ACS54 and the UT54ACTS54 are 4-wide AND-ORINVERT gates. The devices perform the Boolean function: Y = AB+CD+EF+GH The devices are characterized over full military temperature range of -55°C to +125°C. FUNCTION TABLE INPUT OUTPUT ABCDE FGH Y HHXXXXXX L XXHHXXXX L XXXXHHXX L XXXXXXHH L LXLXLXLX H XLXLXLXL H LOGIC SYMBOL A (1) B (13) C (2) (3) D (4) E F (5) (9) G (10) H & & & & >1 (8) Y Note: 1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC Publication 617-12. PINOUTS 14-Pin DIP Top View A 1 14 VDD C 2 13 B D 3 12 NC E 4 11 NC F 5 10 H NC 6 9G VSS 7 8Y 14-Lead Flatpack Top View A 1 14 C 2 13 D 3 12 E 4 11 F 5 10 NC 6 9 VSS 7 8 LOGIC DIAGRAM A B C D E F G H 1 VDD B NC NC H G Y Y OPERATIONAL ENVIRONMENT1 PARAMETER Total Dose SEU Threshold 2 SEL Threshold Neutron Fluence LIMIT 1.0E6 80 120 1.0E14 UNITS rads(Si) MeV-cm2/mg MeV-cm2/mg n/cm2 Notes: 1. Logic will not latchup during radiation exposure within the limits defined in the table. 2. Device storage elements are immune to SEU affects. ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER LIMIT UNITS V...