UT54ACS86E

UT54ACS86E Quadruple 2-Input Exclusive OR Gates March 2015 www.aeroflex.com/Logic Datasheet FEATURES 0.6μm CRH CMOS process - Latchup immune High speed Low power consumption Wide power supply operating range from 3.0V to 5.5V Available QML Q or V processes 14-lead flatpack UT54ACS86E - SMD 5962-96538 DESCRIPTION The UT54ACS86E is a performance and voltage enhanced version of the UT54ACS86 quadruple, two-input Exclusive OR gate. The circuits perform the Boolean functions Y = A ⊕ B or Y = AB + AB in positive logic. An application is as a true/complement element. If one of the inputs is low, the other input will be reproduced in true form at the output. If one of the inputs is high, the signal on the other input will be reproduced inverted at the output. The device is characterized over full military temperature range of -55°C to +125°C. LOGIC SYMBOL (1) A1 (2) B1 (4) A2 (5) B2 (9) A3 (10) B3 (12) A4 (13) B4 =1 (3) Y1 (6) Y2 (8) Y3 (11) Y4 Note: 1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC Publication 617-12. FUNCTION TABLE INPUTS AB LL LH HL HH OUTPUT Y L H H L PINOUT A1 B1 Y1 A2 B2 Y2 VSS 14-Lead Flatpack TopView 1 14 2 13 3 12 4 11 5 10 69 78 LOGIC DIAGRAM A1 B1 Y1 A2 Y2 B2 A3 Y3 B3 A4 Y4 B4 VDD B4 A4 Y4 B3 A3 Y3 36-00-04-006 Ver. 1.0.0 1 Aeroflex Microelectronics Solutions - HiRel OPERATIONAL ENVIRONMENT 1 PARAMETER Total Dose SEU Threshold 2 SEL Threshold Neutron Fluence LIMIT 1.0E6 108 120 1.0E14 Notes: 1. Logic...