GS881Z18T

Preliminary GS881Z18/36T-11/100/80/66 100-Pin TQFP 8Mb Pipelined and Flow Through 100 MHz–66 MHz Commercial Temp Industrial Temp Synchronous NBT SRAMs 3.3 V VDD 2.5 V and 3.3 V VDDQ Features 512K x 18 and 256K x 36 configurations User-configurable Pipelined and Flow Through mode NBT (No Bus Turn Around) functionality allows zero wait Read-Write-Read bus utilization Fully pin-compatible with both pipelined and flow through NtRAM™, NoBL™ and ZBT™ SRAMs IEEE 1149.1 JTAG-compatible Boundary Scan On-chip write parity checking; even or odd selectable Pin-compatible with 2M, 4M and 16M devices 3.3 V +10%/–5% core power supply 2.5 V or 3.3 V I/O supply LBO pin for Linear or Interleave Burst mode Byte write operation (9-bit Bytes) 3 chip enable signals for easy depth expansion Clock Control, registered, address, data, and control ZZ Pin for automatic power-down JEDEC-standard 100-lead TQFP package Pipeline 3-1-1-1 ...