128M x 8 bit DDRII Synchronous DRAM
AS4C128M8D2
Confidential
128M x 8 bit DDRII Synchronous DRAM (SDRAM)
Advanced (Rev. 1.0, Jun. /2013)
Features
JEDEC...
Description
AS4C128M8D2
Confidential
128M x 8 bit DDRII Synchronous DRAM (SDRAM)
Advanced (Rev. 1.0, Jun. /2013)
Features
JEDEC Standard Compliant JEDEC standard 1.8V I/O (SSTL_18-compatible) Power supplies: VDD & VDDQ = +1.8V 0.1V Operating temperature range
- Commercial (0 ~ 85°C)
- Industrial (-40 ~ 95°C)
Fully synchronous operation Fast clock rate: 400 MHz Differential Clock, CK & CK# Bidirectional single/differential data strobe 8 internal banks for concurrent operation 4-bit prefetch architecture Internal pipeline architecture Precharge & active power down Programmable Mode & Extended Mode registers Posted CAS# additive latency (AL): 0, 1, 2, 3, 4, 5, 6 WRITE latency = READ latency - 1 tCK Burst lengths: 4 or 8 Burst type: Sequential / Interleave DLL enable/disable On-die termination (ODT) RoHS compliant Auto Refresh and Self Refresh 8192 refresh cycles / 64ms
- Average refresh period 7.8µs @ 0...
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