CY7C1310BV18, CY7C1910BV18 CY7C1312BV18, CY7C1314BV18
18-Mbit QDR™-II SRAM 2-Word Burst Architecture
Features
■ Separate independent read and write data ports ❐ Supports concurrent transactions
■ 250 MHz clock for high bandwidth
■ 2-word burst on all accesses
■ Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 500 MHz) at ...
