CY7C1317BV18 CY7C1917BV18 CY7C1319BV18 CY7C1321BV18
18-Mbit DDR-II SRAM 4-Word Burst Architecture
Features
Functional Description
18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36) 300-MHz clock for high bandwidth 4-Word burst for reducing address bus frequency Double Data Rate (DDR) interfaces
(data transferred at 600MHz) @ 300 MHz Two input...
