CY7C1323BV25
18-Mbit 4-Word Burst SRAM with DDR-I Architecture
Features
Functional Description
18-Mbit Density (512 Kbit x 36) 167-MHz Clock for high bandwidth 4-Word Burst for reducing address bus frequency Double Data Rate (DDR) interfaces (data transferred at
333 MHz @ 167 MHz) Two input clocks (K and K) for precise DDR timing –
SRAM uses ri...
