Flash Memory. AT49F002 Datasheet

AT49F002 Datasheet PDF, Equivalent


Part Number

AT49F002

Description

2-Megabit 5-volt Only Flash Memory

Manufacture

ATMEL

Total Page 17 Pages
PDF Download
Download AT49F002 Datasheet


AT49F002 Datasheet
Features
Single-voltage Operation
– 5V Read
– 5V Reprogramming
Fast Read Access Time - 55 ns
Internal Program Control and Timer
Sector Architecture
One 16K Byte Boot Block with Programming Lockout
Two 8K Byte Parameter Blocks
Two Main Memory Blocks (96K, 128K Bytes)
Fast Erase Cycle Time - 10 seconds
Byte-by-byte Programming - 10 µs/Byte Typical
Hardware Data Protection
DATA Polling for End of Program Detection
Low Power Dissipation
50 mA Active Current
100 µA CMOS Standby Current
Typical 10,000 Write Cycles
Description
The AT49F002(N)(T) is a 5-volt only in-system reprogrammable Flash memory. Its 2
megabits of memory is organized as 262,144 words by 8 bits. Manufactured with
Atmels advanced nonvolatile CMOS technology, the device offers access times to 55
ns with power dissipation of just 275 mW over the commercial temperature range.
Pin Configurations
(continued)
DIP Top View
Pin Name
A0 - A17
CE
OE
WE
RESET
I/O0 - I/O7
DC
Function
Addresses
Chip Enable
Output Enable
Write Enable
RESET
Data Inputs/Outputs
Dont Connect
* RESET
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 VCC
31 WE
30 A17
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 I/O7
20 I/O6
19 I/O5
18 I/O4
17 I/O3
PLCC Top View
VSOP Top View (8 x 14 mm) or
TSOP Top View (8 x 20 mm)
Type 1
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
I/O0 13
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 I/O7
A11
A9
A8
A13
A14
A17
WE
VCC
* RESET
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
*Note: This pin is a DC on the AT49F002(N)(T).
32 OE
31 A10
30 CE
29 I/O7
28 I/O6
27 I/O5
26 I/O4
25 I/O3
24 GND
23 I/O2
22 I/O1
21 I/O0
20 A0
19 A1
18 A2
17 A3
2-megabit
(256K x 8)
5-volt Only
Flash Memory
AT49F002
AT49F002N
AT49F002T
AT49F002NT
Rev. 1017D10/99
1

AT49F002 Datasheet
When the device is deselected, the CMOS standby current
is less than 100 µA. For the AT49F002N(T) pin 1 for the
DIP and PLCC packages and pin 9 for the TSOP package
are dont connect pins.
To allow for simple in-system reprogrammability, the
AT49F002(N)(T) does not require high input voltages for
programming. Five-volt-only commands determine the read
and programming operation of the device. Reading data
out of the device is similar to reading from an EPROM; it
has standard CE, OE, and WE inputs to avoid bus conten-
tion. Reprogramming the AT49F002(N)(T) is performed by
erasing a block of data and then programming on a byte by
byte basis. The byte programming time is a fast 50 µs. The
end of a program cycle can be optionally detected by the
DATA polling feature. Once the end of a byte program
cycle has been detected, a new access for a read or pro-
gram can begin. The typical number of program and erase
cycles is in excess of 10,000 cycles.
The device is erased by executing the erase command
sequence; the device internally controls the erase opera-
tions. There are two 8K byte parameter block sections and
two main memory blocks.
The device has the capability to protect the data in the boot
block; this feature is enabled by a command sequence.
The 16K-byte boot block section includes a reprogramming
lock out feature to provide data integrity. The boot sector is
designed to contain user secure code, and when the fea-
ture is enabled, the boot sector is protected from being
reprogrammed.
In the AT49F002(N)(T), once the boot block programming
lockout feature is enabled, the contents of the boot block
are permanent and cannot be changed. In the
AT49F002(T), once the boot block programming lockout
feature is enabled, the contents of the boot block cannot be
changed with input voltage levels of 5.5 volts or less.
Block Diagram
VCC
GND
OE
WE
CE
RESET
ADDRESS
INPUTS
CONTROL
LOGIC
Y DECODER
X DECODER
AT49F002(N)
DATA INPUTS/OUTPUTS
I/O7 - I/O0
AT49F002(N)T
DATA INPUTS/OUTPUTS
I/O7 - I/O0
8
INPUT/OUTPUT
BUFFERS
PROGRAM
DATA LATCHES
Y-GATING
MAIN MEMORY
BLOCK 2
(128K BYTES)
MAIN MEMORY
BLOCK 1
(96K BYTES)
PARAMETER
BLOCK 2
(8K BYTES)
PARAMETER
BLOCK 1
(8K BYTES)
BOOT BLOCK
(16K BYTES)
3FFFF
20000
1FFFF
08000
07FFF
06000
05FFF
04000
03FFF
00000
8
INPUT/OUTPUT
BUFFERS
PROGRAM
DATA LATCHES
Y-GATING
BOOT BLOCK
(16K BYTES)
PARAMETER
BLOCK 1
(8K BYTES)
PARAMETER
BLOCK 2
(8K BYTES)
MAIN MEMORY
BLOCK 1
(96K BYTES)
MAIN MEMORY
BLOCK 2
(128K BYTES)
3FFFF
3C000
3BFFF
3A000
39FFF
38000
37FFF
20000
1FFFF
00000
2 AT49F002(N)(T)


Features Datasheet pdf Features • Single-voltage Operation 5V Read – 5V Reprogramming • Fast Read Access Time - 55 ns • Internal Program Control and Timer • Sector Ar chitecture – One 16K Byte Boot Block with Programming Lockout – Two 8K Byt e Parameter Blocks – Two Main Memory Blocks (96K, 128K Bytes) • Fast Erase Cycle Time - 10 seconds • Byte-by-by te Programming - 10 µs/Byte Typical Hardware Data Protection • DATA Pol ling for End of Program Detection • L ow Power Dissipation – 50 mA Active C urrent – 100 µA CMOS Standby Current • Typical 10,000 Write Cycles Descr iption The AT49F002(N)(T) is a 5-volt o nly in-system reprogrammable Flash memo ry. Its 2 megabits of memory is organiz ed as 262,144 words by 8 bits. Manufact ured with Atmel’s advanced nonvolatil e CMOS technology, the device offers ac cess times to 55 ns with power dissipat ion of just 275 mW over the commercial temperature range. Pin Configurations (continued) DIP Top View Pin Name A0 - A17 CE OE WE RESET I/O.
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