IDT8SLVD1208-33I

1:8, LVDS Output Fanout Buffer IDT8SLVD1208-33I DATA SHEET General Description The IDT8SLVD1208-33I is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The IDT8SLVD1208-33I is characterized to operate from a 3.3V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the IDT8SLVD1208-33I ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and eight low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise. Features Eight low skew, low additive jitter LVDS output pairs Two selectable, differential clock input pairs Differential PCLK, nPCLK pairs can accept the following differential input...