Document
DATASHEET
RF Low Noise FET
CE3520K3
20 / 24 GHz Super Low Noise FET in Hollow Plastic PKG
DESCRIPTION
Super Low Noise and High Gain Hollow (Air cavity) Plastic package
FEATURES
Super Low noise figure and high associated gain: NF = 0.55 dB TYP., Ga = 13.8 dB TYP. @VDS = 2 V, ID = 10 mA, f = 20 GHz
NF = 0.80 dB TYP., Ga = 13.9 dB TYP. @VDS = 2 V, ID = 10 mA, f = 24 GHz
PACKAGE
Micro-X plastic package
APPLICATIONS
K-Band LNB (Low Noise Block) Doppler Sensor Low Noise Amplifier for microwave
communication systems
ORDERING INFORMATION
Part Number
CE3520K3
Order Number
CE3520K3-C1
Package
Micro-X plastic package
Marking
C6
Description
• Embossed tape 8 mm wide • Pin 4 (Gate) faces the
perforation side of the tape • MOQ 10k pcs/reel
This document is subject to change without notice.
Date Published: July 2019 CDS-0019-04 (Issue C)
1
PIN CONFIGURATION AND INTERNAL BLOCK DIAGRAM
Pin No.
1 2 3 4
Pin Name
Source Drain Source Gate
CE3520K3
ABSOLUTE MAXIMUM RATINGS
(TA = +25˚C, unless otherwise specified)
Parameter
Symbol
Rating
Drain to Source Voltage
VDS 4.0
Gate to Source Voltage
VGS -3.0
Drain Current
ID IDSS
Gate Current
IG 80
Total Power Dissipation
Ptot 125
Channel Temperature
Tch +150
Storage Temperature
Tstg -55 to +125
Operation Temperature
Top -55 to +125Note
Note Refer to Total Power Dissipation vs. Ambient Temperature graph on page 4
Unit
V V mA µA mW °C °C °C
RECOMMENDED OPERATING RANGE
(TA = +25˚C, unless otherwise specified)
Parameter
Symbol
MIN.
Drain to Source Voltage
VDS +1
Drain Current
ID 5
TYP.
+2 10
MAX.
+3 15
Unit
V mA
This document is subject to change without notice.
2
ELECTRICAL CHARACTERISTICS
(TA = +25˚C, unless otherwise specified)
Parameter
Symbol
Condition
Gate to Source Leak Current Saturated Drain Current
IGSO IDSS
VGS = -3.0V VDS = 2V, VGS = 0V
Gate to Source Cut-off Voltage Transconductance
VGS(off) Gm
VDS = 2V, ID = 100µA VDS = 2V, ID = 10mA
Noise Figure1 Associated Gain1
NF VDS = 2V, ID = 10mA, Ga f = 20GHz
Noise Figure2
NF
Associated Gain2
Ga
1. 100% tested on production devices 2. Not tested on production devices
VDS = 2V, ID = 10mA, f = 24GHz
CE3520K3
MIN.
23.0 -1.10 47.0
11.5
TYP.
0.4 40.0 -0.75 62.0 0.55 13.8
MAX.
10 57.0 -0.39
0.80
-
Unit
µA mA V mS dB dB
- 0.80 1.30 dB
11.5 13.9 - dB
This document is subject to change without notice.
3
TYPICAL CHARACTERISTICS:
(TA=+25℃, unless otherwise specified)
TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE
CE3520K3
DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE
DRAIN CURRENT vs. GATE TO SOURCE VOLTAGE
MINIMUM NOISE FIGURE & ASSOCIATED GAIN vs. DRAIN CURRENT
This document is subject to change without notice.
4
CE3520K3
This document is subject to change without notice.
5
S-PARAMETERS
S-Parameters are available on the CEL web site.
RECOMMENDED SOLDERING CONDITIONS
Recommended Soldering Conditions are provided on the CEL web site.
PACKAGE DIMENSIONS
Micro-X plastic package
CE3520K3
This document is subject to change without notice.
6
REVISION HISTORY
Version
CDS-0019-03 (Issue A) February 12, 2016
CDS-0019-03 (Issue B) April 27, 2016
CDS-0019-04 (Issue A) July 29, 2016
Change to current version
Initial datasheet
Updated Marking Information
Updated Specs in “Absolute Maximum Ratings” Table Added “Typical Characteristics” section (graphs) Added “S-Parameters” and “Recommended Soldering Conditions” sections
CDS-0019-04 (Issue B) Dec 04, 2018
Updated Applications Updated marking by adding a dot to the package Gate
CDS-0019-04 (Issue C) July 02, 2019
Added 24GHz Electrical and Typical Characteristics
CE3520K3
Page(s)
N/A 1, 2, 3 2, 4, 6
1, 2, 6
1,3, 5
This document is subject to change without notice.
7
CE3520K3
[CAUTION]
• All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice.
• You should not alter, modify, copy, or otherwise misappropriate any CEL product, whether in whole or in part.
• CEL does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of CEL products or technical information described in this document. No license, expressed, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of CEL or others.
• Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. CEL assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information.
• CEL has used reasonable care in preparing the information included in t.