CD4006BC

CD4006BM CD4006BC 18-Stage Static Shift Register February 1988 CD4006BM CD4006BC 18-Stage Static Shift Register General Description The CD4006BM CD4006BC 18-stage static shift register is comprised of four separate shift register sections two sections of four stages and two sections of five stages Each section has an independent data input Outputs are available at the fourth stage and the fifth stage of each section A common clock signal is used for all stages Data is shifted to the next stage on the negative-going transition of the clock Through appropriate connections of inputs and outputs multiple register sections of 4 5 8 and 9 stages or single register sections of 10 12 13 14 16 17 and 18 stages can be implemented using one package Features Y Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD (typ ) Low power TTL fan out of 2 driving 74L compatibility or 1 driving 74LS Low clock input capacitance 6 pF (typ ) Medium speed 10 MHz (typ ) (with VDD e 10V) Low power Fully static operation Logic Diagrams Connection Diagram Dual-In-Line Package TL F 5942 – 1 TL F 5942 – 2 Top View Order Number CD4006B TL F 5942 – 3 Truth Table TL F 5942 – 4 X e Don’t care D e Level change NC e No change C1995 National Semiconductor Corporation TL F 5942 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Notes 1 and 2) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for a...