9ZXL1230 Datasheet: 12-OUTPUT LOW POWER DIFFERENTIAL BUFFER





9ZXL1230 12-OUTPUT LOW POWER DIFFERENTIAL BUFFER Datasheet

Part Number 9ZXL1230
Description 12-OUTPUT LOW POWER DIFFERENTIAL BUFFER
Manufacture IDT
Total Page 18 Pages
PDF Download Download 9ZXL1230 Datasheet PDF

Features: DATASHEET 12-OUTPUT LOW POWER DIFFERENTI AL BUFFER FOR PCIE GEN3 AND QPI 9ZXL123 0 General Description The 9ZXL1230 is a small-footprint, low power 12-output differential buffer that meets all the performance requirements of the Intel D B1900Z specification. It is pin compati ble to the 9ZX21200. The 9ZXL1230 is ba ckwards compatible to PCIe Gen2 and QPI 6.4GT/s specifications. A fixed, inter nal feedback path maintains low drift f or critical QPI applications. Recommend ed Application 12-output Low Power PCIe Gen3/QPI differential buffer for Romle y Output Features • 12 - 0.7V low-pow er HCSL-compatible output pairs Block D iagram Features/Benefits • Low-power push-pull outputs; Save power and boar d space - no Rp • Pin compatible to 9 ZX21200; easy path to >50% power saving s • Space-saving 56-pin QFN package Fixed feedback path for 0ps input-to -output delay • 9 Selectable SMBus Ad dresses; Mulitple devices can share the same SMBus Segment • 4 OE# pins; Hardware control of four ou.

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DATASHEET
12-OUTPUT LOW POWER DIFFERENTIAL BUFFER FOR PCIE GEN3 AND QPI 9ZXL1230
General Description
The 9ZXL1230 is a small-footprint, low power 12-output
differential buffer that meets all the performance
requirements of the Intel DB1900Z specification. It is pin
compatible to the 9ZX21200. The 9ZXL1230 is backwards
compatible to PCIe Gen2 and QPI 6.4GT/s specifications. A
fixed, internal feedback path maintains low drift for critical
QPI applications.
Recommended Application
12-output Low Power PCIe Gen3/QPI differential buffer for
Romley
Output Features
12 - 0.7V low-power HCSL-compatible output pairs
Block Diagram
Features/Benefits
Low-power push-pull outputs; Save power and board
space - no Rp
Pin compatible to 9ZX21200; easy path to >50% power
savings
Space-saving 56-pin QFN package
Fixed feedback path for 0ps input-to-output delay
9 Selectable SMBus Addresses; Mulitple devices can
share the same SMBus Segment
4 OE# pins; Hardware control of four outputs, other
outputs free run
PLL or bypass mode; PLL can dejitter incoming clock
100MHz or 133MHz PLL mode operation; supports PCIe
and QPI applications
Selectable PLL bandwidth; minimizes jitter peaking in
downstream PLL's
Spread Spectrum Compatible; tracks spreading input
clock for low EMI
Key Specifications
Cycle-to-cycle jitter <50ps
Output-to-output skew <65 ps
Input-to-output delay variation <50ps
PCIe Gen3 phase jitter <1.0ps RMS
QPI 9.6GT/s 12UI phase jitter <0.2ps RMS
OE(8,6,4,2)#
DIF_IN
DIF_IN#
Z-PLL
(SS Compatible)
DFB_OUT_NC
DIF(11:0)
HIBW_BYPM_LOBW#
100M_133M#
CKPWRGD/PD#
SMB_A0_tri
SMB_A1_tri
SMBDAT
SMBCLK
Logic
IDT® 12-OUTPUT LOW POWER DIFFERENTIAL BUFFER FOR PCIE GEN3 AND QPI
1
9ZXL1230
REV B 041112

                    
                    






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