AD9433

01977-001 FEATURES IF sampling up to 350 MHz SNR: 67.5 dB, fIN up to Nyquist at 105 MSPS SFDR: 83 dBc, fIN = 70 MHz at 105 MSPS SFDR: 72 dBc, fIN = 150 MHz at 105 MSPS 2 V p-p analog input range On-chip clock duty cycle stabilization On-chip reference and track-and-hold SFDR optimization circuit Excellent linearity DNL: ±0.25 LSB (typical) INL: ±0.5 LSB (typical) 750 MHz full power analog bandwidth Power dissipation: 1.35 W (typical) at 125 MSPS Twos complement or offset binary data format 5.0 V analog supply operation 2.5 V to 3.3 V TTL/CMOS outputs APPLICATIONS Cellular infrastructure communication systems 3G single- and multicarrier receivers IF sampling schemes Wideband carrier frequency systems Point-to-point radios LMDS, wireless broadband MMDS base station units Cable reverse path Communications test equipment Radar and satellite ground systems GENERAL INTRODUCTION The AD9433 is a 12-bit, monolithic sampling analog-to-digital converter (ADC) with an on-chip track-and-hold cir...