AD9204

Data Sheet 10-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9204 08122-001 FEATURES 1.8 V analog supply operation 1.8 V to 3.3 V output supply SNR 61.3 dBFS at 9.7 MHz input 61.0 dBFS at 200 MHz input SFDR 75 dBc at 9.7 MHz input 73 dBc at 200 MHz input Low power 30 mW per channel at 20 MSPS 63 mW per channel at 80 MSPS Differential input with 700 MHz bandwidth On-chip voltage reference and sample-and-hold circuit DNL = ±0.11 LSB Serial port control options Scalable analog input: 1 V p-p to 2 V p-p differential Offset binary, gray code, or twos complement data format Optional clock duty cycle stabilizer Integer 1-to-8 input clock divider Built-in selectable digital test pattern generation Energy-saving power-down modes Data clock out with programmable clock and data alignment APPLICATIONS Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems Battery-powered instruments Handheld scope meters Ultrasound Radar/LIDAR PET/SPECT imaging FUNCTIONAL BLOCK DIAGRAM AVDD GND SDIO SCLK CSB VIN+A VIN–A VREF SENSE VCM RBIAS VIN–B VIN+B REF SELECT SPI ADC PROGRAMMING DATA MUX OPTION AD9204 ADC DIVIDE DUTY CYCLE 1 TO 8 STABILIZER MODE CONTROLS CMOS OUTPUT BUFFER CMOS OUTPUT BUFFER ORA D9A D0A DCOA DRVDD ORB D9B D0B DCOB CLK+ CLK– SYNC DCS PDWN DFS OEB Figure 1. PRODUCT HIGHLIGHTS 1. The AD9204 operates from a single 1.8 V an...