Multiservice Line Card Adaptive Clock Translator
Data Sheet
Quad PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator AD9554-1
FEATURES
Supports GR-1244 S...
Description
Data Sheet
Quad PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator AD9554-1
FEATURES
Supports GR-1244 Stratum 3 stability in holdover mode Supports smooth reference switchover with virtually no
disturbance on output phase Supports Telcordia GR-253 jitter generation, transfer, and
tolerance for SONET/SDH up to OC-192 systems Supports ITU-T G.8262 synchronous Ethernet slave clocks Supports ITU-T G.823, ITU-T G.824, ITU-T G.825, and
ITU-T G.8261 Auto/manual holdover and reference switchover Adaptive clocking allows dynamic adjustment of feedback
dividers for use in OTN mapping/demapping applications Quad digital phase-locked loop (DPLL) architecture with four
reference inputs (single-ended or differential) 4 × 4 crosspoint allows any reference input to drive any PLL Input reference frequencies from 2 kHz to 1000 MHz Reference validation and frequency monitoring: 2 ppm Programmable input reference switchover priority 20-bit programmable input reference divider 4 different...
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