CD4028BMS

CD4028BMS December 1992 CMOS BCD-To-Decimal Decoder Pinout CD4028BMS TOP VIEW Features High Voltage Type (20V Rating) BCD-to-Decimal Decoding or Binary-to-Octal Decoding High Decoded Output Drive Capability “Positive Logic” Inputs and Outputs - Decoded Outputs Go High On Selection Medium-Speed Operation - tPHL, tPLH = 80ns (typ) at VDD = 10V Standardized Symmetrical Output Characteristics 100% Tested For Quiescent Current at 20V Maximum Input Current of 1µA at 18V Over Full Package-Temperature Range; - 100nA at 18V and +25oC Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V 5V, 10V and 15V Parametric Ratings Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” 4 1 2 2 0 3 7 4 9 5 5 6 6 7 VSS 8 16 VDD 15 3 14 1 13 B 12 C 11 D 10 A 9 8 Functional Diagram VDD 3-BIT BINARY INPUTS 16 0 10 13 BCD INPUTS 12 11 A B C D 1 2 3 4 5 6 7 8 9 8 VSS 3 14 2 15 1 6 7 4 9 5 BUFFERED DECIMAL DECODED OUTPUTS (1 OF 10) BUFFERED OCTAL DECODED OUTPUTS (1 OF 8) Applications Code Conversion Indication-Tube Decoder Address Decoding - Memory Selection Control Description CD4028BMS types are BCD-to-decimal or binary-to-octal decoders consisting of buffering on all 4 inputs, decoding logic gates, and 10 output buffers. A BCD code applied to the four inputs, A to D, results in a high level at the selected one of 10 decimal decoded outputs. S...