SN74LS122 MULTIVIBRATORS Datasheet

SN74LS122 Datasheet, PDF, Equivalent


Part Number

SN74LS122

Description

RETRIGGERABLE MONOSTABLE MULTIVIBRATORS

Manufacture

Motorola

Total Page 10 Pages
Datasheet
Download SN74LS122 Datasheet


SN74LS122
RETRIGGERABLE MONOSTABLE
MULTIVIBRATORS
These dc triggered multivibrators feature pulse width control by three meth-
ods. The basic pulse width is programmed by selection of external resistance
and capacitance values. The LS122 has an internal timing resistor that allows
the circuits to be used with only an external capacitor. Once triggered, the ba-
sic pulse width may be extended by retriggering the gated low-level-active (A)
or high-level-active (B) inputs, or be reduced by use of the overriding clear.
Overriding Clear Terminates Output Pulse
Compensated for VCC and Temperature Variations
DC Triggered from Active-High or Active-Low Gated Logic Inputs
Retriggerable for Very Long Output Pulses, up to 100% Duty Cycle
Internal Timing Resistors on LS122
SN54 / 74LS123 (TOP VIEW)
(SEE NOTES 1 THRU 4)
VCC
1ĂRext/
Cext
1
Cext
16
15
14
1Q
13
2Q
12
2
CLR
11
2B
10
2A
9
Q
CLR Q
CLR
Q
Q
1
1A
2
1B
3
1
CLR
4
1Q
5
2Q
6
2
Cext
78
2 GND
Rext/
Cext
SN54 / 74LS122 (TOP VIEW)
(SEE NOTES 1 THRU 4)
VCC
14
Rext/
Cext
NC
13
12
Cext
11
NC
10
Rint
9
Q
8
Rint
Q
Q
CLR
1
A1
2
A2
3
B1
NC Ċ NO INTERNAL CONNECTION.
4
B2
5
CLR
67
Q GND
NOTES:
1. An external timing capacitor may be connected between Cext and Rext/Cext (positive).
2. To use the internal timing resistor of the LS122, connect Rint to VCC.
3. For improved pulse width accuracy connect an external resistor between Rext/Cext and
VCC with Rint open-circuited.
4. To obtain variable pulse widths, connect an external variable resistance between Rint/Cext
and VCC.
SN54/74LS122
SN54/74LS123
RETRIGGERABLE MONOSTABLE
MULTIVIBRATORS
LOW POWER SCHOTTKY
16
1
16
1
16
1
14
1
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
D SUFFIX
SOIC
CASE 751B-03
J SUFFIX
CERAMIC
CASE 632-08
14
1
14
1
N SUFFIX
PLASTIC
CASE 646-06
D SUFFIX
SOIC
CASE 751A-02
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
FAST AND LS TTL DATA
5-197

SN74LS122
SN54/74LS122 SN54/74LS123
CLEAR
L
X
X
X
H
H
H
H
H
H
H
LS122
FUNCTIONAL TABLE
INPUTS
A1 A2 B1 B2
XXXX
HHXX
XXLX
XXXL
L X H
L XH
XL H
X L H
H HH
↓ ↓HH
HHH
L XHH
X L HH
OUTPUTS
QQ
LH
LH
LH
LH
LS123
FUNCTIONAL TABLE
INPUTS
OUTPUTS
CLEAR A B Q Q
L X X LH
X H X LH
X X L LH
H L
H H
LH
TYPICAL APPLICATION DATA
The output pulse tW is a function of the external compo-
nents, Cext and Rext or Cext and Rint on the LS122. For values
of Cext 1000 pF, the output pulse at VCC = 5.0 V and VRC =
5.0 V (see Figures 1, 2, and 3) is given by
tW = K Rext Cext where K is nominally 0.45
If Cext is on pF and Rext is in kthen tW is in nanoseconds.
The Cext terminal of the LS122 and LS123 is an internal
connection to ground, however for the best system perfor-
mance Cext should be hard-wired to ground.
Care should be taken to keep Rext and Cext as close to the
monostable as possible with a minimum amount of inductance
between the Rext/Cext junction and the Rext/Cext pin. Good
groundplane and adequate bypassing should be designed
into the system for optimum performance to insure that no
false triggering occurs.
It should be noted that the Cext pin is internally connected
to ground on the LS122 and LS123, but not on the LS221.
Therefore, if Cext is hard-wired externally to ground, substitu-
tion of a LS221 onto a LS123 socket will cause the LS221 to
become non-functional.
The switching diode is not needed for electrolytic capaci-
tance application and should not be used on the LS122 and
LS123.
To find the value of K for Cext 1000 pF, refer to Figure 4.
Variations on VCC or VRC can cause the value of K to change,
as can the temperature of the LS123, LS122. Figures 5 and
6 show the behavior of the circuit shown in Figures 1 and 2 if
separate power supplies are used for VCC and VRC. If VCC is
tied to VRC, Figure 7 shows how K will vary with VCC and
temperature. Remember, the changes in Rext and Cext with
temperature are not calculated and included in the graph.
As long as Cext 1000 pF and 5K Rext 260K
(SN74LS122 / 123) or 5K Rext 160 K (SN54LS122 / 123),
the change in K with respect to Rext is negligible.
If Cext 1000 pF the graph shown on Figure 8 can be used
to determine the output pulse width. Figure 9 shows how K will
change for Cext 1000 pF if VCC and VRC are connected to the
same power supply. The pulse width tW in nanoseconds is
approximated by
tW = 6 + 0.05 Cext (pF) + 0.45 Rext (k) Cext + 11.6 Rext
In order to trim the output pulse width, it is necessary to
include a variable resistor between VCC and the Rext/Cext pin
or between VCC and the Rext pin of the LS122. Figure 10, 11,
and 12 show how this can be done. Rext remote should be kept
as close to the monostable as possible.
Retriggering of the part, as shown in Figure 3, must not
occur before Cext is discharged or the retrigger pulse will not
have any effect. The discharge time of Cext in nanoseconds is
guaranteed to be less than 0.22 Cext (pF) and is typically 0.05
Cext (pF).
For the smallest possible deviation in output pulse widths
from various devices, it is suggested that Cext be kept
1000 pF.
FAST AND LS TTL DATA
5-198


Features RETRIGGERABLE MONOSTABLE MULTIVIBRATORS These dc triggered multivibrators featu re pulse width control by three methods . The basic pulse width is programmed b y selection of external resistance and capacitance values. The LS122 has an in ternal timing resistor that allows the circuits to be used with only an extern al capacitor. Once triggered, the basic pulse width may be extended by retrigg ering the gated low-level-active (A) or high-level-active (B) inputs, or be re duced by use of the overriding clear. Overriding Clear Terminates Output P ulse • Compensated for VCC and Temper ature Variations • DC Triggered from Active-High or Active-Low Gated Logic I nputs • Retriggerable for Very Long O utput Pulses, up to 100% Duty Cycle • Internal Timing Resistors on LS122 SN 54 / 74LS123 (TOP VIEW) (SEE NOTES 1 TH RU 4) VCC 1ĂRext/ Cext 1 Cext 16 15 14 1Q 13 2Q 12 2 CLR 11 2B 10 2A 9 Q CLR Q CLR Q Q 1 1A 2 1B 3 1 CLR 4 1Q 5 2Q 6 2 Cext 78 2 GND Rext/ Cext SN54 / 74LS122.
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