OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE
The SN54 / 74LS377 is an 8-bit...
OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE
The SN54 / 74LS377 is an 8-bit register built using advanced Low Power
Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable.
The SN54 / 74LS378 is a 6-Bit Register with a buffered common enable. This device is similar to the SN54 / 74LS174, but with common Enable rather than common Master Reset.
The SN54 / 74LS379 is a 4-Bit Register with buffered common Enable. This device is similar to the SN54 / 74LS175 but features the common Enable rather then common Master Reset.
8-Bit High Speed Parallel Registers Positive Edge-Triggered D-Type Flip Flops Fully Buffered Common Clock and Enable Inputs True and Complement Outputs Input Clamp Diodes Limit High Speed Termination Effects
PIN NAMES
LOADING (Note a)
HIGH
LOW
E Enable (Active LOW) Input
0.5 U.L.
0.25 U.L.
D0 – D3 CP
Data Inputs Clock (Ac...