MOSFET. FDMC86340 Datasheet

FDMC86340 Datasheet PDF, Equivalent


Part Number

FDMC86340

Description

MOSFET

Manufacture

Fairchild Semiconductor

Total Page 7 Pages
PDF Download
Download FDMC86340 Datasheet PDF


FDMC86340 Datasheet
January 2014
FDMC86340
N-Channel Shielded Gate Power Trench® MOSFET
80 V, 48 A, 6.5 mΩ
Features
General Description
„ Shielded Gate MOSFET Technology
„ Max rDS(on) = 6.5 mΩ at VGS = 10 V, ID = 14 A
„ Max rDS(on) = 8.5 mΩ at VGS = 8 V, ID = 12 A
„ High performance technology for extremely low rDS(on)
„ Termination is Lead-free
„ RoHS Compliant
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process that
incorporates Shielded Gate technology. This process has been
optimized for the on-state resistance and yet maintain superior
switching performance.
Application
„ DC-DC Conversion
Pin 1
Pin 1
S
S
SG
D
DD
D
Top Bottom
Power 33
S
S
S
G
D
D
D
D
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Continuous
-Pulsed
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 4)
(Note 3)
(Note 1a)
Ratings
80
±20
48
14
200
216
54
2.3
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1)
(Note 1a)
2.3
53
°C/W
Device Marking
FDMC86340
Device
FDMC86340
Package
Power33
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2013 Fairchild Semiconductor Corporation
FDMC86340 Rev. C2
1
www.fairchildsemi.com

FDMC86340 Datasheet
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = 250 μA, VGS = 0 V
ID = 250 μA, referenced to 25 °C
VDS = 64 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
80 V
46 mV/°C
1
±100
μA
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
2.0 3.4 4.0 V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
-10 mV/°C
VGS = 10 V, ID = 14 A
5.0 6.5
rDS(on)
Static Drain to Source On Resistance
VGS = 8 V, ID = 12 A
6.0 8.5 mΩ
VGS = 10 V, ID = 14 A, TJ = 125 °C
8.5 11
gFS Forward Transconductance
VDD = 10 V, ID = 14 A
36 S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
VDS = 40 V, VGS = 0 V,
f = 1 MHz
2775 3885 pF
468 655 pF
15 25 pF
0.1 0.7 2.1 Ω
Switching Characteristics
td(on)
tr
td(off)
tf
Qg(TOT)
Qg(TOT)
Qgs
Qgd
Qoss
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Output Charge
VDD = 40 V, ID = 14 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 0 V to 10 V
VGS = 0 V to 8 V
VDD = 40 V,
ID = 14 A
VDD = 40 V, VGS = 0 V
20 32 ns
7.9 16 ns
23 37 ns
5.1 10 ns
38 53 nC
31 44 nC
14 nC
8.0 nC
42 nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
VGS = 0 V, IS = 14 A
VGS = 0 V, IS = 1.9 A
(Note 2)
(Note 2)
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = 14 A, di/dt = 100 A/μs
0.8 1.3 V
0.7 1.2 V
41 66 ns
25 40 nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 53 °C/W when mounted
on a 1 in2 pad of 2 oz
copper
b. 125 °C/W when mounted
on a minimum pad of 2 oz
copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 216 mJ is based on starting TJ = 25 °C, L = 3 mH, IAS = 12 A, VDD = 80 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 37 A.
4. Pulsed Id limited by junction temperature, td<=100 μS, please refer to SOA curve for more details.
©2013 Fairchild Semiconductor Corporation
FDMC86340 Rev. C2
2
www.fairchildsemi.com


Features Datasheet pdf FDMC86340 N-Channel Shielded Gate Power Trench® MOSFET January 2014 FDMC8634 0 N-Channel Shielded Gate Power Trench ® MOSFET 80 V, 48 A, 6.5 mΩ Features General Description „ Shielded Gate MOSFET Technology „ Max rDS(on) = 6.5 mΩ at VGS = 10 V, ID = 14 A „ Max rD S(on) = 8.5 mΩ at VGS = 8 V, ID = 12 A „ High performance technology for ext remely low rDS(on) „ Termination is Le ad-free „ RoHS Compliant This N-Chann el MOSFET is produced using Fairchild S emiconductor’s advanced PowerTrench® process that incorporates Shielded Gat e technology. This process has been opt imized for the on-state resistance and yet maintain superior switching perform ance. Application „ DC-DC Conversion Pin 1 Pin 1 S S SG D DD D Top Bottom Power 33 S S S G D D D D MOSFET Max imum Ratings TA = 25 °C unless otherwi se noted Symbol VDS VGS ID EAS PD TJ, TSTG Parameter Drain to Source Voltag e Gate to Source Voltage Drain Curren t -Continuous -Continuous -Pulsed TC = 25 °C TA = 25 °C Si.
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