MOSFET. FDPC8014S Datasheet

FDPC8014S Datasheet PDF, Equivalent


Part Number

FDPC8014S

Description

MOSFET

Manufacture

Fairchild Semiconductor

Total Page 12 Pages
PDF Download
Download FDPC8014S Datasheet


FDPC8014S Datasheet
April 2014
FDPC8014S
PowerTrench® Power Clip
25V Asymmetric Dual N-Channel MOSFET
Features
General Description
Q1: N-Channel
„ Max rDS(on) = 3.8 mΩ at VGS = 10 V, ID = 20 A
„ Max rDS(on) = 4.7 mΩ at VGS = 4.5 V, ID = 18 A
Q2: N-Channel
„ Max rDS(on) = 1.2 mΩ at VGS = 10 V, ID = 41 A
„ Max rDS(on) = 1.4 mΩ at VGS = 4.5 V, ID = 37 A
„ Low inductance packaging shortens rise/fall times, resulting in
lower switching losses
„ MOSFET integration enables optimum layout for
lower circuit inductance and reduced switch node
ringing
„ RoHS Compliant
This device includes two specialized N-Channel MOSFETs in a
dual package. The switch node has been internally connected to
enable easy placement and routing of synchronous buck
converters. The control MOSFET (Q1) and synchronous
SyncFETTM (Q2) have been designed to provide optimal power
efficiency.
Applications
„ Computing
„ Communications
„ General Purpose Point of Load
PIN1
PIN1
PAD10
V+(HSD)
HSG
GR
V+
V+
PAD9
GND(LSS)
LSG HSG
SW GR
SW V+
SW V+
SW
LSG
SW
SW
SW
Top Power Clip 5X6 Bottom
Pin Name Description
1 HSG HighSideGate
2 GR Gate Return
Pin
3,4,10
5,6,7
Name
V+(HSD)
SW
Description
Pin
High Side Drain
8
Switching Node, Low Side Drain 9
Name
Description
LSG
Low Side Gate
GND(LSS) Low Side Source
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
-Pulsed
Single Pulse Avalanche Energy
Power Dissipation for Single Operation
Power Dissipation for Single Operation
Operating and Storage Junction Temperature Range
TC = 25 °C
TA = 25 °C
TA = 25 °C (Note 4)
(Note 3)
TC = 25 °C
TA = 25 °C
Q1
25Note5
Q2
25
±12 ±12
60
20Note1a
110
41Note1b
75 160
73 253
21
2.1Note1a
42
2.3 Note1b
-55 to +150
Units
V
V
A
mJ
W
°C
Thermal Characteristics
RθJC
RθJA
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
6.0
60Note1a
130Note1c
3.0
55Note1b
120Note1d
°C/W
©2013 Fairchild Semiconductor Corporation
FDPC8014S Rev.C7
1
www.fairchildsemi.com

FDPC8014S Datasheet
Package Marking and Ordering Information
Device Marking
05OD/16OD
Device
FDPC8014S
Package
Power Clip 56
Reel Size
13 ”
Tape Width
12 mm
Quantity
3000 units
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ID = 1 mA, VGS = 0 V
Q1 25
Q2 25
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
ID = 10 mA, referenced to 25 °C
Q1
Q2
Zero Gate Voltage Drain Current
VDS = 20 V, VGS = 0 V
VDS = 20 V, VGS = 0 V
Q1
Q2
Gate to Source Leakage Current,
Forward
VGS = 12 V/-8 V, VDS= 0 V
VGS = 12 V/-8 V, VDS= 0 V
Q1
Q2
On Characteristics
VGS(th)
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = 250 μA
VGS = VDS, ID = 1 mA
Q1 0.8
Q2 1.1
ID = 250 μA, referenced to 25 °C
ID = 10 mA, referenced to 25 °C
Q1
Q2
VGS = 10V, ID = 20 A
VGS = 4.5 V, ID = 18 A
VGS = 10 V, ID = 20 A,TJ =125 °C
Q1
VGS = 10V, ID = 41 A
VGS = 4.5 V, ID = 37 A
VGS = 10 V, ID = 41 A ,TJ =125 °C
Q2
VDS = 5 V, ID = 20 A
VDS = 5 V, ID = 41 A
Q1
Q2
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
Rg Gate Resistance
Q1:
VDS = 13 V, VGS = 0 V, f = 1 MHZ
Q2:
VDS = 13 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
Q1
Q2
Q1
Q2
Q1 0.1
Q2 0.1
Typ Max Units
V
24
24
mV/°C
1 μA
500 μA
±100
±100
nA
nA
1.3 2.5
1.4 2.5
V
-4
-3
mV/°C
2.8 3.8
3.4 4.7
3.9 5.3
mΩ
0.9 1.2
1.0 1.4
1.1 1.5
182
315
S
1695
6580
495
1720
54
204
0.4
0.4
2375
9870
710
2580
100
370
1.2
1.2
pF
pF
pF
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr Rise Time
td(off)
Turn-Off Delay Time
tf Fall Time
Qg Total Gate Charge
Qg Total Gate Charge
Qgs Gate to Source Gate Charge
Qgd Gate to Drain “Miller” Charge
Q1:
VDD = 13 V, ID = 20 A, RGEN = 6 Ω
Q2:
VDD = 13 V, ID = 41 A, RGEN = 6 Ω
VGS = 0 V to 10 V
Q1
VGS = 0 V to 4.5 V
VDD = 13 V, ID
= 20 A
Q2
VDD = 13 V, ID
= 41 A
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
8
16
16
28
ns
2
6
10
11
ns
24
47
38
75
ns
2
4
10
10
ns
25
93
35
130
nC
11
43
16
60
nC
3.4
13
nC
2.2
8.5
nC
©2013 Fairchild Semiconductor Corporation
FDPC8014S Rev.C7
2
www.fairchildsemi.com


Features Datasheet pdf FDPC8014S PowerTrench® Power Clip Apri l 2014 FDPC8014S PowerTrench® Power C lip 25V Asymmetric Dual N-Channel MOSFE T Features General Description Q1: N -Channel „ Max rDS(on) = 3.8 mΩ at VG S = 10 V, ID = 20 A „ Max rDS(on) = 4. 7 mΩ at VGS = 4.5 V, ID = 18 A Q2: N-C hannel „ Max rDS(on) = 1.2 mΩ at VGS = 10 V, ID = 41 A „ Max rDS(on) = 1.4 mΩ at VGS = 4.5 V, ID = 37 A „ Low in ductance packaging shortens rise/fall t imes, resulting in lower switching loss es „ MOSFET integration enables optimu m layout for lower circuit inductance a nd reduced switch node ringing „ RoHS Compliant This device includes two spe cialized N-Channel MOSFETs in a dual pa ckage. The switch node has been interna lly connected to enable easy placement and routing of synchronous buck convert ers. The control MOSFET (Q1) and synchr onous SyncFETTM (Q2) have been designed to provide optimal power efficiency. A pplications „ Computing „ Communicati ons „ General Purpose Point of Load PIN1 PIN1 PAD10 V+(HSD).
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