Document
FDMS3600S PowerTrench® Power Stage
FDMS3600S
PowerTrench® Power Stage
August 2011
25 V Asymmetric Dual N-Channel MOSFET
Features
General Description
Q1: N-Channel Max rDS(on) = 5.6 mΩ at VGS = 10 V, ID = 15 A Max rDS(on) = 8.1 mΩ at VGS = 4.5 V, ID = 14 A
Q2: N-Channel Max rDS(on) = 1.6 mΩ at VGS = 10 V, ID = 30 A Max rDS(on) = 2.4 mΩ at VGS = 4.5 V, ID = 25 A Low inductance packaging shortens rise/fall times, resulting in
lower switching losses
This device includes two specialized N-Channel MOSFETs in a dual PQFN package. The switch node has been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous SyncFET (Q2) have been designed to provide optimal power efficiency.
Applications
Computing
MOSFET integration enables optimum layout for lower circuit inductance and reduced switch node ringing
RoHS Compliant
Communications General Purpose Point of Load Notebook VCOR.