MOSFET. FDMS3626S Datasheet

FDMS3626S Datasheet PDF, Equivalent


Part Number

FDMS3626S

Description

MOSFET

Manufacture

Fairchild Semiconductor

Total Page 13 Pages
PDF Download
Download FDMS3626S Datasheet PDF


FDMS3626S Datasheet
December 2011
FDMS3626S
PowerTrench® Power Stage
25V Asymmetric Dual N-Channel MOSFET
Features
Q1: N-Channel
„ Max rDS(on) = 5.0 mΩ at VGS = 10 V, ID = 17.5 A
„ Max rDS(on) = 5.7 mΩ at VGS = 4.5 V, ID = 16 A
Q2: N-Channel
„ Max rDS(on) = 2.6 mΩ at VGS = 10 V, ID = 25 A
„ Max rDS(on) = 3.2 mΩ at VGS = 4.5 V, ID = 22 A
„ Low inductance packaging shortens rise/fall times, resulting in
lower switching losses
„ MOSFET integration enables optimum layout for
lower circuit inductance and reduced switch node
ringing
„ RoHS Compliant
General Description
This device includes two specialized N-Channel MOSFETs in a
dual PQFN package. The switch node has been internally
connected to enable easy placement and routing of synchronous
buck converters. The control MOSFET (Q1) and synchronous
SyncFET (Q2) have been designed to provide optimal power
efficiency.
Applications
„ Computing
„ Communications
„ General Purpose Point of Load
„ Notebook VCORE
Pin 1
Pin 1
G1 D1 D1 D1
D1
PHASE
(S1/D2)
G2S2S2 S2
Top
Power 56
Bottom
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous
-Pulsed
Single Pulse Avalanche Energy
Power Dissipation for Single Operation
Power Dissipation for Single Operation
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 4)
TC = 25 °C
TA = 25 °C
(Note 3)
TA = 25 °C
TA = 25 °C
Q1 Q2
25 25
±12 ±12
30
17.51a
55
251b
70 100
29
2.21a
1.01c
45
2.51b
1.01d
-55 to +150
Units
V
V
A
mJ
W
°C
RθJA
RθJA
RθJC
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Package Marking and Ordering Information
571a
1251c
3.0
501b
1201d
3.0
°C/W
Device Marking
08OD
10OD
Device
FDMS3626S
Package
Power 56
Reel Size
13 ”
Tape Width
12 mm
Quantity
3000 units
©2011 Fairchild Semiconductor Corporation
FDMS3626S Rev.C2
1
www.fairchildsemi.com

FDMS3626S Datasheet
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSS
Gate to Source Leakage Current
ID = 250 μA, VGS = 0 V
ID = 1 mA, VGS = 0 V
ID = 250 μA, referenced to 25 °C
ID = 10 mA, referenced to 25 °C
VDS = 20 V, VGS = 0 V
VGS = 12 V/-8 V, VDS= 0 V
Q1 25
Q2 25
Q1
Q2
Q1
Q2
Q1
Q2
V
12
25
mV/°C
1 μA
500 μA
±100
±100
nA
nA
On Characteristics
VGS(th)
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Drain to Source On Resistance
gFS Forward Transconductance
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
Rg Gate Resistance
VGS = VDS, ID = 250 μA
VGS = VDS, ID = 1 mA
Q1 0.8 1.2
Q2 1.1 1.4
2.0
2.2
V
ID = 250 μA, referenced to 25 °C
ID = 10 mA, referenced to 25 °C
Q1
Q2
-4
-3
mV/°C
VGS = 10 V, ID = 17.5 A
VGS = 4.5 V, ID = 16 A
VGS = 10 V, ID = 17.5 A,TJ =125 °C
VGS = 10 V, ID = 25 A
VGS = 4.5 V, ID = 22 A
VGS = 10 V, ID =25 A ,TJ =125 °C
Q1
Q2
3.8 5.0
4.4 5.7
5.4 7.0
mΩ
2.1 2.6
2.6 3.2
2.9 3.8
VDS = 5 V, ID = 17.5 A
VDS = 5 V, ID = 25 A
Q1 100
Q2 227
S
Q1:
VDS = 13 V, VGS = 0 V, f = 1 MHZ
Q2:
VDS = 13 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
1570
2545
448
716
61
103
0.4
0.9
pF
pF
pF
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr Rise Time
td(off)
Turn-Off Delay Time
tf Fall Time
Qg Total Gate Charge
Qg Total Gate Charge
Qgs Gate to Source Gate Charge
Qgd Gate to Drain “Miller” Charge
Q1:
VDD = 13 V, ID = 17.5 A, RGEN = 6 Ω
Q2:
VDD = 13 V, ID = 25 A, RGEN = 6 Ω
VGS = 0 V to 10 V Q1
VDD = 13 V,
VGS = 0 V to 4.5 V ID = 17.5 A
Q2
VDD = 13 V,
ID = 25 A
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
7
8
2
4
23
31
2
3
26
41
12
19
3.3
4.9
2.7
4.3
ns
ns
ns
ns
nC
nC
nC
nC
©2011 Fairchild Semiconductor Corporation
FDMS3626S Rev.C2
2
www.fairchildsemi.com


Features Datasheet pdf FDMS3626S PowerTrench® Power Stage Dec ember 2011 FDMS3626S PowerTrench® Pow er Stage 25V Asymmetric Dual N-Channel MOSFET Features Q1: N-Channel „ Max rDS(on) = 5.0 mΩ at VGS = 10 V, ID = 1 7.5 A „ Max rDS(on) = 5.7 mΩ at VGS = 4.5 V, ID = 16 A Q2: N-Channel „ Max rDS(on) = 2.6 mΩ at VGS = 10 V, ID = 2 5 A „ Max rDS(on) = 3.2 mΩ at VGS = 4 .5 V, ID = 22 A „ Low inductance packa ging shortens rise/fall times, resultin g in lower switching losses „ MOSFET i ntegration enables optimum layout for l ower circuit inductance and reduced swi tch node ringing „ RoHS Compliant Gen eral Description This device includes t wo specialized N-Channel MOSFETs in a d ual PQFN package. The switch node has b een internally connected to enable easy placement and routing of synchronous b uck converters. The control MOSFET (Q1) and synchronous SyncFET (Q2) have been designed to provide optimal power effi ciency. Applications „ Computing „ Co mmunications „ General Purpose Point of Load „ Notebook VCORE.
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