Document
CD4041UB CD4041UBC Quad True Complement Buffer
February 1988
CD4041UB CD4041UBC Quad True Complement Buffer
General Description
The CD4041UB CD4041UBC is a quad true complement buffer consisting of N- and P-channel enhancement mode transistors having low-channel resistance and high current (sourcing and sinking) capability The CD4041 is intended for use as a buffer line driver or CMOS-to-TTL driver All inputs are protected from static discharge by diode clamps to VDD and VSS
Features
Y Y Y
Y
Wide supply voltage range 3 0V to 15V High noise immunity 40% VDD (typ ) True output High current source and sink capability 8 mA (typ ) VO e 9 5V VDD e 10V 3 2 mA (typ ) VO e 0 4V VDD e 5V (two TTL loads) Complement output Medium current source and sink capability 3 6 mA (typ ) VO e 9 5V VDD e 10V 1 6 mA (typ ) VO e 0 4V VDD e 5V
Connection and Schematic Diagrams
Dual-In-Line Package 1 of 4 Identical Units
TL F 5965 – 1
Top View Order Number CD4041UB
TL F 5965 – 2
C1995 National Semiconductor Corporation
TL F 5965
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings
(Notes 1 and 2)
If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications
b 0 5V to a 18V Supply Voltage (VDD) b 0 5V to VDD a 0 5V Input Voltage (VIN) b 65 C to a 150 C Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line 700 mW Small Outline 500 mW Lead Temp (TL) (Soldering 10 sec ) 260 C
Recommended Operating Conditions (Note 2)
Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD4041UB CD4041UBC 3V to 15V 0V to VDD
b 55 C to a 125 C b 40 C to a 85 C
DC Electrical Characteristics CD4041UBM (Note 2)
Symbol IDD Parameter Conditions
b 55 C a 25 C a 125 C
Units mA mA mA V V V V V V
Min Quiescent Device Current VDD e 5V VDD e 10V VDD e 15V Low Level Output Voltage
Max 1 2 4 0 05 0 05 0 05
Min
Typ 0 01 0 01 0 01 0 0 0
Max 1 2 4 0 05 0 05 0 05
Min
Max 30 60 120 0 05 0 05 0 05
VOL
lIOl k 1 mA VIL e 0V VIH e VDD VDD e 5V VDD e 10V VDD e 15V
VOH
High Level Output Voltage lIOl k 1 mA VIL e 0V VIH e VDD VDD e 5V 4 95 VDD e 10V 9 95 VDD e 15V 14 95 Low Level Input Voltage
4 95 9 95 14 95 10 20 30
5 10 15 2 4 6 10 20 30
4 95 9 95 14 95 10 20 30 40 80 12 0 12 35 8 0 55 14 30
b1 0 b2 8 b6 b0 4 b 1 25 b2 7 b1 0
VIL
l IO l k 1 m A VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V l IO l k 1 m A VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V
40 80 12 0 21 6 25 14 10 25 55
b 1 75 b5 0 b 11 b 0 75 b 2 25 b4 8
V V V V V V mA mA mA mA mA mA mA mA mA mA mA mA
VIH
High Level Input Voltage
40 80 12 0 16 50 12 08 2 45
b1 4 b4 b9 b0 6 b1 8 b4 b0 1
3 6 9 32 10 24 16 40 90
b2 8 b8 0 b 18 b1 2 b3 6 b8 b 10 b 5 b 0 1
IOL
Low Level Output Current VIL e 0V True Output VDD e 5V VO e 0 4V (Note 3) VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V Low Level Output Current VIH e VDD Complement Output VD.