PCM CODEC. 821024 Datasheet

821024 Datasheet PDF, Equivalent


Part Number

821024

Description

QUAD NON-PROGRAMMABLE PCM CODEC

Manufacture

IDT

Total Page 14 Pages
PDF Download
Download 821024 Datasheet PDF


821024 Datasheet
QUAD NON-PROGRAMMABLE
PCM CODEC
821024
DATASHEET
FEATURES
4 channel CODEC with on-chip digital lters
Selectable A-law or μ-law companding
Master clock frequency selection: 2.048 MHz, 4.096 MHz or
8.192 MHz
- Internal timing automatically adjusted based on MCLK and frame
sync signal
Separate PCM and master clocks
Single PCM port with up to 8.192 MHz data rate (128 time slots)
Transhybrid balance impedance hardware adjustable via external
components
Transmit gains hardware adjustable via external components
Low power +5.0 V CMOS technology
+5.0 V single power supply
Package available: 32 pin PLCC, 44 pin TQFP
DESCRIPTION
The IDT821024 is a single-chip, four channel PCM CODEC with on-
chip lters. The device provides analog-to-digital and digital-to-analog
conversions and supports both a-law and μ−law companding. The digital
lters in IDT821024 provides the necessary transmit and receive ltering for
voice telephone circuit to interface with time-division multiplexed systems.
All of the digital lters are performed in digital signal processors operating
from an internal clock, which is derived from MCLK. The xed lters set
the transmit and receive gain and frequency response.
In the IDT821024 the PCM data is transmitted to and received from the
PCM highway in time slots determined by the individual Frame Sync signals
(LFoSnRg naannddSFhSoXrtn,FwrahmereeSny=nc1-m4)oadtersataerse
from 256 KHz to
available in the
8.192 MHz.
IDT821024.
Both
The IDT821024 can be used in digital telecommunication applications
such as PBX, Central Ofce Switch, Digital Telephone and Integrated
Voice/Data Access Unit.
FUNCTIONAL BLOCK DIAGRAM
821024 REVISION A JUNE 25, 2014
1 ©2014 Integrated Device Technology, Inc.

821024 Datasheet
821024 DATA SHEET
PIN CONFIGURATIONS
IIN1
IIN2
VOUT2
VCCA
IREF
AGND
VOUT3
IIN3
IIN4
5
6
7
8
9
10
11
12
13
32-Pin
PLCC
29 PCLK
28 TSC
27 DGND
26 DX
25 VCCD
24 DR
23 FSR1
22 FSX1
21 FSR2
IIN2
VOUT2
NC
NC
VCCA
IREF
AGND
NC
NC
VOUT3
IIN3
1
2
3
4
5
6
7
8
9
10
11
QUAD NON-PROGRAMMABLE
PCM CODEC
44-Pin
TQFP
2
33 NC
32 NC
31 TSC
30 DGND
29 NC
28 DX
27 VCCD
26 DR
25 FSR1
24 FSX1
23 FSR2
REVISION A 06/25/14


Features Datasheet pdf QUAD NON-PROGRAMMABLE PCM CODEC 821024 DATASHEET FEATURES • 4 channel CODEC with on-chip digital filters • Sele ctable A-law or μ-law companding • M aster clock frequency selection: 2.048 MHz, 4.096 MHz or 8.192 MHz - Internal timing automatically adjusted based on MCLK and frame sync signal • Separate PCM and master clocks • Single PCM p ort with up to 8.192 MHz data rate (128 time slots) • Transhybrid balance im pedance hardware adjustable via externa l components • Transmit gains hardwar e adjustable via external components Low power +5.0 V CMOS technology • +5.0 V single power supply • Package available: 32 pin PLCC, 44 pin TQFP DE SCRIPTION The IDT821024 is a single-ch ip, four channel PCM CODEC with on- ch ip filters. The device provides analog -to-digital and digital-to-analog conv ersions and supports both a-law and μ law companding. The digital filters in IDT821024 provides the necessary tr ansmit and receive filtering for voice telephone circuit to i.
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