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VSC8117 Data Sheet
ATM/SONET/SDH 622Mb/s or 155Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery
FEATURES
● Operates at either STS-3/STM-1 (155.52Mb/s) or STS-12/STM-4 (622.08Mb/s) data rates
● Compatible with industry ATM UNI devices ● On-chip clock generation of the 155.52MHz
or 622.08MHz high-speed clock (Mux) ● On-chip clock recovery of the 155.52MHz or
622.08MHz high-speed clock (Demux) ● 8-bit parallel TTL interface ● SONET/SDH frame recovery ● Loss of Signal (LOS) input and LOS detection
● 3.3V/5V programmable PECL serial interface ● Provides Equipment, Facilities, Split Loopback,
and Loop Timing modes ● Provides TTL and PECL reference clock inputs ● Low power: 1W typical ● 64-pin PQFP package
GENERAL DESCRIPTION
The VSC8117 is an ATM/SONET/SDH-compatible transceiver that integrates an on-chip clock multiplication unit (CMU) for the high-speed clock, as well as a clock and data recovery (CDR) unit with 8-bit serial-to-parallel and parallel-to-serial data conversion. The phase-locked loop (PLL) clock is used for serialization in the transmit direction (Mux). The recovered clock is used for deserialization in the receive direction (Demux). The demultiplexer contains SONET/SDH frame detection and recovery. The VSC8117 provides facility, equipment, and loopback modes.
The VSC8117 provides an integrated solution for ATM physical layers and SONET/SDH systems app...
