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CD4099BM Dataheets PDF



Part Number CD4099BM
Manufacturers National Semiconductor
Logo National Semiconductor
Description 8-Bit Addressable Latch
Datasheet CD4099BM DatasheetCD4099BM Datasheet (PDF)

CD4099BM CD4099BC 8-Bit Addressable Latch February 1988 CD4099BM CD4099BC 8-Bit Addressable Latch General Description The CD4099B is an 8-bit addressable latch with three address inputs (A0–A2) an active low enable input (E) active high clear input (CL) a data input (D) and eight outputs (Q0 – Q7) Data is entered into a particular bit in the latch when that bit is addressed by the address inputs and the enable (E) is low Data entry is inhibited when enable (E) is high When clear (CL) and enabl.

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CD4099BM CD4099BC 8-Bit Addressable Latch February 1988 CD4099BM CD4099BC 8-Bit Addressable Latch General Description The CD4099B is an 8-bit addressable latch with three address inputs (A0–A2) an active low enable input (E) active high clear input (CL) a data input (D) and eight outputs (Q0 – Q7) Data is entered into a particular bit in the latch when that bit is addressed by the address inputs and the enable (E) is low Data entry is inhibited when enable (E) is high When clear (CL) and enable (E) are high all outputs are low When clear (CL) is high and enable (E) is low the channel demultiplexing occurs The bit that is addressed has an active output which follows the data input while all unaddressed bits are held low When operating in the addressable latch mode (E e CL e low) changing more than one bit of the address could impose a transient wrong address Therefore this should only be done while in the memory mode (E e high CL e low) Features Y Y Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD (typ ) Low power TTL fan out of 2 driving 74L compatibility or 1 driving 74LS Serial to parallel capability Storage register capability Random (addressable) data entry Active high demultiplexing capability Common active high clear Connection Diagram CD4099B Dual-In-Line Package Order Number CD4099B TL F 5984 – 1 Top View Truth Table Mode Selection E L H L H CL L L H H Addressed Latch Follows Data Holds Previous Data Follows Data Reset to ‘‘0’’ Unaddressed Latch Holds Previous Data Holds Previous Data Reset to ‘‘0’’ Reset to ‘‘0’’ Mode Addressable Latch Memory Demultiplexer Clear C1995 National Semiconductor Corporation TL F 5984 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Notes 1 2) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering 10 seconds) b 0 5 to a 18 VDC b 0 5 to VDD a 0 5 VDC b 65 C to a 150 C Recommended Operating Conditions (Note 2) DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD4099BM CD4099BC 3 0 to 15 VDC 0 to VDD VDC b 55 C to a 125 C b 40 C to a 85 C 700 mW 500 mW 260 C DC Electrical Characteristics CD4099BM (Note 2) Symbol IDD Parameter Quiescent Device Current Low Level Output Voltage Conditions VDD e 5V VIN e VDD or VSS VDD e 10V VIN e VDD or VSS VDD e 15V VIN e VDD or VSS b 55 C a 25 C a 125 C Units mA mA mA V V V V V V Min Max 50 10 20 0 05 0 05 0 05 Min Typ 0 02 0 02 0 02 0 0 0 Max 50 10 20 0 05 0 05 0 05 Min Max 150 300 600 0 05 0 05 0 05 VOL l IO l s 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l s 1 m A VDD e 5V VDD e 10V VDD e 15V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V 35 70 11 0 0 64 16 42 b 0 64 b1 6 b4 2 VOH High Level Output Voltage 4 95 9 95 14 95 15 30 40 4 95 9 95 14 95 50 10 15 2 25 45 6 75 15 30 40 4 95 9 95 14 95 15 30 40 35 70 11 0 0 36 09 24 b 0 36 b0 9 b2 4 b 0 10 b1 0 VIL Low Level Input Voltage High Level Input Voltage Low Level Output Current (Note 3) V V V V V V mA mA mA mA mA mA VIH 35 70 11 0 0 51 13 34 b 0 51 b1 3 b3 4 b 0 10 2 75 55 8 25 0 88 2 25 88 b 0 88 b 2 25 b8 8 b 10 b 5 IOL IOH High Level Output VDD e 5V VO e 4 6V Current (Note 3) VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V Input Current VDD e 15V VIN e 0V VDD e 15V VIN e 15V IIN 0 10 10b5 0 10 10 mA mA DC Electrical Characteristics CD4099BC (Note 2) Symbol IDD Parameter Quiescent Device Current Low Level Output Voltage Conditions VDD e 5V VIN e VDD or VSS VDD e 10V VIN e VDD or VSS VDD e 15V VIN e VDD or VSS b 40 C a 25 C a 85 C Units mA mA mA V V V V V V Min Max 20 40 80 0 05 0 05 0 05 Min Typ 0 02 0 02 0 02 0 0 0 Max 20 40 80 0 05 0 05 0 05 Min Max 150 300 600 0 05 0 05 0 05 VOL l IO l s 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l s 1 m A VDD e 5V VDD e 10V VDD e 15V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V 2 35 70 11 0 4 95 9 95 14 95 VOH High Level Output Voltage 4 95 9 95 14 95 15 30 40 35 70 11 0 5 10 15 2 25 45 6 75 2 75 55 8 25 15 30 40 4 95 9 95 14 95 15 30 40 35 70 11 0 VIL Low Level Input Voltage High Level Input Voltage V V V V V V VIH DC Electrical Characteristics CD4099BC (Note 2) (Continued) Symbol IOL Parameter Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current Conditions VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V VDD e 5V VO e 4 6V VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V VDD e 15V VIN e 0V VDD e 15V VIN e 15V b 40 C a 25 C a 85 C Units mA mA mA .


CD4099BC CD4099BM CD4099BMS


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