Document
P1403EK
P-Channel Logic Level Enhancement Mode MOSFET
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
-30V
14mΩ @VGS = 10V
ID -30A
PDFN 5*6P
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
LIMITS
Drain-Source Voltage
VDS -30
Gate-Source Voltage
VGS ±25
TC = 25 °C(Package Limited)
-30
Continuous Drain Current
TC = 25 °C(Silicon Limited)
ID
-52
Pulsed Drain Current1
TC = 100 °C
-33 IDM -150
Continuous Drain Current
TA = 25 °C TA = 70 °C
-10 ID -8
Avalanche Current
IAS -40
Avalanche Energy
L = 0.1mH
EAS 83
TC = 25 °C
62.5
Power Dissipation
TC = 100 °C TA = 25 °C
25 PD
2.5
TA = 70 °C
1.6
Operating Junction & Storage Temperature Range
TJ, TSTG
-55 to 150
UNITS V
A
mJ W °C
REV 1.0 1 2014/7/1
P1403EK
P-Channel Logic Level Enhancement Mode MOSFET
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient 1Pulse width limited by maximum junction temperature.
SYMBOL RqJC RqJA
TYPI.