EM48AM1684VTC

eorex Revision History Revision 0.1 (Aug. 2007) - First release. Revision 0.2 (Jan. 2009).. - modify improved ICCs EM48AM1684VTC Jan. 2009 www.eorex.com 1/18 eorex EM48AM1684VTC 256Mb (4M×4Bank×16) Synchronous DRAM Features Fully Synchronous to Positive Clock Edge Single 3.3V ±0.3V Power Supply LVTTL Compatible with Multiplexed Address Programmable Burst Length (B/L) - 1, 2, 4, 8 or Full Page Programmable CAS Latency (C/L) - 2 or 3 Data Mask (DQM) for Read / Write Masking Programmable Wrap Sequence – Sequential (B/L = 1/2/4/8/full Page) – Interleave (B/L = 1/2/4/8) Burst Read with Single-bit Write Operation All Inputs are Sampled at the Rising Edge of the System Clock Auto Refresh and Self Refresh 8,192 Refresh Cycles / 64ms (7.8us) Ordering Information Description The EM48AM1684VTC is Synchronous Dynamic Random Access Memory (SDRAM) organized as 4Meg words x 4 banks by 16 bits. All inputs and outputs are synchronized with the ...