EM488M3244VBC

eorex Preliminary EM488M3244VBC 256Mb (2M×4Bank×32) Synchronous DRAM Features Fully Synchronous to Positive Clock Edge Single 2.7V ~ 3.6V Power Supply LVCMOS Compatible with Multiplexed Address Programmable Burst Length (B/L) - 1, 2, 4, 8 or Full Page Programmable CAS Latency (C/L) - 2 or 3 Data Mask (DQM) for Read / Write Masking Programmable Wrap Sequence – Sequential (B/L = 1/2/4/8/full Page) – Interleave (B/L = 1/2/4/8) Burst Read with Single-bit Write Operation Deep Power Down Mode. Auto Refresh and Self Refresh Special Function Support. – PASR (Partial Array Self Refresh) – Auto TCSR (Temperature Compensated Self Refresh) Programmable Driver Strength Control – Full Strength or 1/2, 1/4 of Full Strength 4,096 Refresh Cycles / 64ms (15.625us) Description The EM488M3244VBC is Synchronous Dynamic Random Access Memory (SDRAM) organized as 2Meg words x 4 banks by 32 bits. All inputs and outputs are synchronized with t...