Flash Plus. SST38VF6403 Datasheet

SST38VF6403 Plus. Datasheet pdf. Equivalent

Part SST38VF6403
Description 64 Mbit (x16) Advanced Multi-Purpose Flash Plus
Feature Not recommended for new designs. Please use SST38VF6401B/6402B/6403B/64040B 64 Mbit (x16) Advanced M.
Manufacture Microchip
Datasheet
Download SST38VF6403 Datasheet

www.DataSheet.co.kr 64 Mbit (x16) Advanced Multi-Purpose Fl SST38VF6403 Datasheet
Not recommended for new designs. Please use SST38VF6401B/640 SST38VF6403 Datasheet
SST38VF6401B / SST38VF6402B SST38VF6403B / SST38VF6404B 64 M SST38VF6403B Datasheet
Recommendation Recommendation Datasheet SST38VF6403 Datasheet





SST38VF6403
Not recommended for new designs.
Please use SST38VF6401B/6402B/6403B/64040B
64 Mbit (x16) Advanced Multi-Purpose Flash Plus
SST38VF6401 / SST38VF6402 / SST38VF6403 / SST38VF6404
Not Recommended for New Designs
The SST38VF6401/6402/6403/6404 are 4M x16 CMOS Advanced Multi-Purpose
Flash Plus (Advanced MPF+) devices manufactured with proprietary, high-perfor-
mance CMOS Super- Flash technology. The split-gate cell design and thick-oxide
tunneling injector attain better reliability and manufacturability compared with
alternate approaches. The SST38VF6401/6402/6403/6404 write (Program or
Erase) with a 2.7-3.6V power supply. This device conforms to JEDEC standard
pin assignments for x16 memories.
Features
• Organized as 4M x16
• Single Voltage Read and Write Operations
– 2.7-3.6V
• Superior Reliability
– Endurance: 100,000 Cycles minimum
– Greater than 100 years Data Retention3
• Low Power Consumption (typical values at 5 MHz)
– Active Current: 4 mA (typical)
– Standby Current: 3 µA (typical)
– Auto Low Power Mode: 3 µA (typical)
• 128-bit Unique ID
• Security-ID Feature
– 256 Word, user One-Time-Programmable
• Protection and Security Features
– Hardware Boot Block Protection/WP# Input Pin, Uni-
form (32 KWord) and Non-Uniform (8 KWord) options
available
– User-controlled individual block (32 KWord) protection,
using software only methods
– Password protection
• Hardware Reset Pin (RST#)
• Fast Read and Page Read Access Times:
– 90 ns Read access time
– 25 ns Page Read access times
- 4-Word Page Read buffer
• Latched Address and Data
• Fast Erase Times:
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 40 ms (typical)
• Erase-Suspend/-Resume Capabilities
• Fast Word and Write-Buffer Programming Times:
– Word-Program Time: 7 µs (typical)
– Write Buffer Programming Time: 1.75 µs / Word (typical)
- 16-Word Write Buffer
• Automatic Write Timing
– Internal VPP Generation
• End-of-Write Detection
– Toggle Bits
– Data# Polling
– RY/BY# Output
• CMOS I/O Compatibility
• JEDEC Standard
– Flash EEPROM Pinouts and command sets
• CFI Compliant
• Packages Available
– 48-lead TSOP
– 48-ball TFBGA
• All devices are RoHS compliant
© 2015
www.microchip.com
DS-20005015B
08/15



SST38VF6403
64 Mbit (x16) Advanced Multi-Purpose Flash Plus
SST38VF6401 / SST38VF6402 / SST38VF6403 / SST38VF6404
Product Description
Not Recommended for New Designs
The SST38VF6401, SST38VF6402, SST38VF6403, and SST38VF6404 devices are 4M x16 CMOS
Advanced Multi-Purpose Flash Plus (Advanced MPF+) manufactured with proprietary, high-perfor-
mance CMOS SuperFlash technology. The split-gate cell design and thick-oxide tunneling injector
attain better reliability and manufacturability compared with alternate approaches. The SST38VF6401/
6402/6403/6404 write (Program or Erase) with a 2.7-3.6V power supply. These devices conform to
JEDEC standard pin assignments for x16 memories.
Featuring high performance Word-Program, the SST38VF6401/6402/6403/6404 provide a typical Word-
Program time of 7 µsec. For faster word-programming performance, the Write-Buffer Programming
feature, has a typical word-program time of 1.75 µsec. These devices use Toggle Bit or Data# Polling
to indicate Program operation completion. In addition to single-word Read, Advanced MPF+ devices
provide a Page-Read feature that enables a faster word read time of 25 ns, for words on the same
page.
To protect against inadvertent write, the SST38VF6401/6402/6403/6404 have on-chip hardware and
Software Data Protection schemes. Designed, manufactured, and tested for a wide spectrum of appli-
cations, these devices are available with 100,000 cycles minimum endurance. Data retention is rated
at greater than 100 years.
The SST38VF6401/6402/6403/6404 are suited for applications that require the convenient and econom-
ical updating of program, configuration, or data memory. For all system applications, Advanced MPF+
significantly improve performance and reliability, while lowering power consumption. These devices
inherently use less energy during Erase and Program than alternative flash technologies. The total
energy consumed is a function of the applied voltage, current, and time of application. For any given
voltage range, the SuperFlash technology uses less current to program and has a shorter erase time;
therefore, the total energy consumed during any Erase or Program operation is less than alternative
flash technologies.
These devices also improve flexibility while lowering the cost for program, data, and configuration stor-
age applications. The SuperFlash technology provides fixed Erase and Program times, independent of
the number of Erase/Program cycles that have occurred. Therefore, the system software or hardware
does not have to be modified or de-rated as is necessary with alternative flash technologies, whose
Erase and Program times increase with accumulated Erase/Program cycles.
The SST38VF6401/6402/6403/6404 also offer flexible data protection features. Applications that
require memory protection from program and erase operations can use the Boot Block, Individual
Block Protection, and Advanced Protection features. For applications that require a permanent solu-
tion, the Irreversible Block Locking feature provides permanent protection for memory blocks.
To meet high-density, surface mount requirements, the SST38VF6401/6402/6403/6404 devices are
offered in 48-lead TSOP and 48-ball TFBGA packages. See Figures 2 and 3 for pin assignments and
Table 1 for pin descriptions.
© 2015
DS-20005015B
08/15
2





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