MSC7115

Freescale Semiconductor Data Sheet Low-Cost 16-bit DSP with DDR Controller Document Number: MSC7115 Rev. 11, 4/2008 MSC7115 MAP-BGA–400 17 mm × 17 mm StarCore® SC1400 DSP extended core with one SC1400 DSP core, 192 Kbyte of internal SRAM M1 memory, 16 way 16 Kbyte instruction cache (ICache), four-entry write buffer, programmable interrupt controller (PIC), and low-power Wait and Stop processing modes. 192 Kbyte M2 memory for critical data and temporary data buffering. 8 Kbyte boot ROM. AHB-Lite crossbar switch that allows parallel data transfers between four master ports and six slave ports, where each port connects to an AHB-Lite bus; fixed or round robin priority programmable at each slave port; programmable bus parking at each slave port; low power mode. Internal PLL generates up to 266 MHz clock for the SC1400 core and up to 133 MHz for the crossbar switch, DMA channels, M2 memory, and other peripherals. Clock synthesis module provides predivision of P...