CMOS Dual Binary to 1 of 4 Decoder/Demultiplexers
CD4555BMS CD4556BMS
December 1992
CMOS Dual Binary to 1 of 4 Decoder/Demultiplexers
Pinouts
E A B 1 2 3 4 5 6 7 8
Feat...
Description
CD4555BMS CD4556BMS
December 1992
CMOS Dual Binary to 1 of 4 Decoder/Demultiplexers
Pinouts
E A B 1 2 3 4 5 6 7 8
Features
High Voltage Type (20V Rating) CD4555BMS: Outputs High on Select CD4556BMS: Outputs Low on Select Expandable with Multiple Packages
CD4556BMS TOP VIEW
16 VDD 15 E 14 A 13 B 12 Q0 11 Q1 10 Q2 9 Q3 1/2 OF DUAL
1/2 OF DUAL
Q0 Q1 Q2 Q3 VSS
100% Tested for Quiescent Current at 20V Standardized, Symmetrical Output Characteristics Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V 5V, 10V and 15V Parametric Ratings Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”
1/2 OF DUAL
CD4555BMS TOP VIEW
E A B Q0 Q1 Q2 Q3 VSS 1 2 3 4 5 6 7 8 16 VDD 15 E 14 A 13 B 12 Q0 11 Q1 10 Q2 9 Q3 1/2 OF DUAL
Applications
Decoding Code Conversion Demultiplexing (Using Enable Input as a Data Input Memory Chip-Enable Selection Function Selection
Functional Diagrams
VDD A B E 2 3 1 16 4 5 6 7 12 11 10 9 VSS 8 Q0 Q1 Q2 Q3 Q0 Q1 Q2 Q3
Description
CD4555BMS and CD4556BMS are dual one-of-four decoders/demultiplexers. Each decoder has two select inputs (A and B), an Enable input (E), and four mutually exclusive outputs. On the CD4555BMS the outputs are high on select; on the CD4556BMS the outputs are low on select. When the Ena...
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