STATIC RAM. TC51V8512AF-12 Datasheet

TC51V8512AF-12 RAM. Datasheet pdf. Equivalent


Part TC51V8512AF-12
Description SILICON GATE CMOS PSEUDO STATIC RAM
Feature rOSHIBA SILICON GATE CMOS TC51V8512AF/ AFT/ A1R-12/15 PRELIMINARY 524,288 WORD x 8 BIT CMOS PSEUD.
Manufacture Toshiba
Datasheet
Download TC51V8512AF-12 Datasheet


rOSHIBA SILICON GATE CMOS TC51V8512AF/ AFT/ A1R-12/15 PREL TC51V8512AF-12 Datasheet
Recommendation Recommendation Datasheet TC51V8512AF-12 Datasheet




TC51V8512AF-12
rOSHIBA
SILICON GATE CMOS
TC51V8512AF/ AFT/ A1R-12/15
PRELIMINARY
524,288 WORD x 8 BIT CMOS PSEUDO STATIC RAM
Description
The TC51V8512AF is a 4M bit high speed CMOS pseudo static RAM organized as 524,288 words by 8 bits. The TC51V8512AF
utilizes a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high s~ed and low power
storage. The TC51 V8512AF operates from a single 3.0V power supply. Refreshing is supported by a refresh (OEIRFSH) input which
enables two types of refreshing - auto refresh and self refresh. The TC51V8512AF features a static RAM-like interface with a write
cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface.
The TC51V8512AF is available in a 32-pin small outline plastic flat package, and a thin small outline package (forward type,
reverse type).
Features
• Organization: 524,288 words x 8 bits
• Low voltage function: 3.0V±10%
• Data retention supply voltage: 2.0V - 3.3V
• Fast access time
TC51V8512AF Family
tCEA CE Access Time
tOEA OE Access Time
tRC Cycle Time
Power Dissipation
Self Refresh Current
1 3.0V
-12 -15
120ns
150ns
60ns
80ns
190ns
230ns
99mW
66mW
40llA
• Auto refresh is supported by an internal refresh address
counter
• Self refresh is supported by an internal timer
• Inputs and outputs TIL compatible
• Refresh: 2048 refresh cycles/32ms
• Package
- TC51V8512AF: SOP32-P-525
- TC51V8512AFT: TSOP32-P-400
- TC518V512ATR: TSOP32-P-400A
AIS
Al6
A14
Al2
A7
A6
AS
A4
A3
A2
Al
AO
1/01
1/02
1/03
GND
Vao
AI5
AI7
Rf'N
Al3
AS
A9
All
()tJmH
AtO
ct
1108
1/07
1106
1/05
1/04
AIS
Al6
AI4
Al2
A7
A6
AS
A4
A3
A2
Al
AO
1/01
1102
1103
GND
Pin Names
AO - A18
RIW
OE/RFSH
CE
1101 - 1/08
Voo
GND
Address Inputs
Read/Write Control Input
Output Enable Input
Refresh Input
Chip Enable Input
Data InputslOutputs
Power
Ground
TDSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
D~205



TC51V8512AF-12
TC51 V8512AFIAFTIATR-12/15
Static RAM
Block Diagram
voo GND
8 COLUMN
DECODER
MEMORY
ARRAY
2048 x 256 x8
,cc
0
0
"-
R/Wo---<r
Operating Mode
MODE
Read
Write
cr only Refresh
Auto/Self Refresh
Standby
CE
DEI
RFSH
R/W AD NA18 1/01- 8
.L L H
V' OUT
L L V' IN
L H H V' HZ
.. ..H L
HZ
HH
HZ
H = High level input (VIH)
L =Low level input (VIU
• = VIH orVIL
= At the falling edge of CE, all address inputs are latched. At all other times, the address inputs are "'''.
HZ =High impedance
Maximum Ratings
SYMBOL
ITEM
VIN Input Voltage
VOUT Output Voltage
Voo Power Supply Voltage
TOPR Operating Temperature
TSTRG Storage Temperature
TSOLDER Soldering Temperature· Time
Po Power Dissipation
lOUT Short Circuit Output Current
RATING
-1.0 -7.0
-1.0 -7.0
-1.0 -7.0
0-70
-55 - 150
260·10
600
50
UNIT NOTES
V
V
V
°C
°C
°C· sec
mW
rnA
1
0-206
TOSHIBA AMERICA ELECTRONIC COMPONENTS. INC.
PRELIMINARY







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