NAND E2PROM. TC58DVM92A5TAI0 Datasheet

TC58DVM92A5TAI0 E2PROM. Datasheet pdf. Equivalent


Part TC58DVM92A5TAI0
Description 512M-BIT (64M x 8 BITS) CMOS NAND E2PROM
Feature TC58DVM92A5TAI0 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 512-MBIT (64M × 8 BITS) CMO.
Manufacture Toshiba
Datasheet
Download TC58DVM92A5TAI0 Datasheet


TC58DVM92A5TAI0 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILIC TC58DVM92A5TAI0 Datasheet
Recommendation Recommendation Datasheet TC58DVM92A5TAI0 Datasheet




TC58DVM92A5TAI0
TC58DVM92A5TAI0
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
512-MBIT (64M × 8 BITS) CMOS NAND E2PROM
DESCRIPTION
The device is a single 3.3 V 512Mbit (553,648,128 bit) NAND Electrically Erasable and Programmable Read-Only
Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 4096 blocks. The device has a 528-byte static
register which allows program and read data to be transferred between the register and the memory cell array in
528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes + 512 bytes: 528 bytes ×
32 pages).
The device is a serial-type memory device which utilizes the I/O pins for both address and data input/output as
well as for command inputs. The Erase and Program operations are automatically executed making the device most
suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and
other systems which require high-density non-volatile memory data storage.
FEATURES
Organization
Memory cell allay 528 × 128K × 8
Register
528 × 8
Page size
528 bytes
Block size
(16K + 512) bytes
Modes
Read, Reset, Auto Page Program, Auto Block Erase, Status Read
Mode control
Serial input/output
Command control
Power supply
VCC = 2.7 V to 3.6 V
Access time
Cell array to register 25 μs max
Serial Read Cycle 40 ns min
Program/Erase time
Auto Page Program 300 μs/page typ.
Auto Block Erase 2.5 ms/block typ.
Operating current
Read (40 ns cycle)
Program (avg.)
Erase (avg.)
Standby
20 mA max.
20 mA max.
20 mA max.
50 μA max
Package
TSOPI48-P-1220-0.50 (Weight: 0.53g typ.)
1 2010-07-13



TC58DVM92A5TAI0
PIN ASSIGNMENT (TOP VIEW)
NC
NC
NC
NC
NC
NC
RY / BY
RE
CE
NC
NC
VCC
VSS
NC
NC
CLE
ALE
WE
WP
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 NC
47 NC
46 NC
45 NC
44 I/O8
43 I/O7
42 I/O6
41 I/O5
40 NC
39 NC
38 NC
37 VCC
36 VSS
35 NC
34 NC
33 NC
32 I/O4
31 I/O3
30 I/O2
29 I/O1
28 NC
27 NC
26 NC
25 NC
PIN NAMES
I/O1 to I/O8
CE
WE
RE
CLE
ALE
WP
RY/BY
VCC
VSS
NC
I/O port
Chip enable
Write enable
Read enable
Command latch enable
Address latch enable
Write protect
Ready/Busy
Power supply
Ground
No connection
TC58DVM92A5TAI0
2 2010-07-13







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)