NAND E2PROM. TH58NVG4S0HTA20 Datasheet

TH58NVG4S0HTA20 E2PROM. Datasheet pdf. Equivalent


Part TH58NVG4S0HTA20
Description 16G-BIT (2G x 8 BIT) CMOS NAND E2PROM
Feature TH58NVG4S0HTA20 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 16 GBIT (2G  8 BIT) CMOS.
Manufacture Toshiba
Datasheet
Download TH58NVG4S0HTA20 Datasheet


TH58NVG4S0HTA20 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILI TH58NVG4S0HTA20 Datasheet
Recommendation Recommendation Datasheet TH58NVG4S0HTA20 Datasheet




TH58NVG4S0HTA20
TH58NVG4S0HTA20
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
16 GBIT (2G 8 BIT) CMOS NAND E2PROM
DESCRIPTION
The TH58NVG4S0HTA20 is a single 3.3V 16 Gbit (18,253,611,008 bits) NAND Electrically Erasable and
Programmable Read-Only Memory (NAND E2PROM) organized as (4096 256) bytes 64 pages 8192blocks.
The device has two 4352-byte static registers which allow program and read data to be transferred between the
register and the memory cell array in 4352-byte increments. The Erase operation is implemented in a single block
unit (256 Kbytes 16 Kbytes: 4352 bytes 64 pages).
The TH58NVG4S0HTA20 is a serial-type memory device which utilizes the I/O pins for both address and data
input/output as well as for command inputs. The Erase and Program operations are automatically executed making
the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still
cameras and other systems which require high-density non-volatile memory data storage.
FEATURES
Organization
Memory cell array
Register
Page size
Block size
x8
4352 128K 8 4
4352 8
4352 bytes
(256K 16K) bytes
Modes
Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy,
Multi Page Program, Multi Block Erase, Multi Page Copy, Multi Page Read
Mode control
Serial input/output
Command control
Number of valid blocks
Min 8032 blocks
Max 8192 blocks
Power supply
VCC 2.7V to 3.6V
Access time
Cell array to register 25 s max
Serial Read Cycle
25 ns min (CL=50pF)
Program/Erase time
Auto Page Program
Auto Block Erase
300 s/page typ.
2.5 ms/block typ.
Operating current
Read (25 ns cycle)
Program (avg.)
Erase (avg.)
Standby
30 mA max.
30 mA max
30 mA max
200 A max
Package
TSOP I 48-P-1220-0.50 (Weight: 0.56 g typ.)
8 bit ECC for each 512Byte is required.
1 2016-06-30C



TH58NVG4S0HTA20
PIN ASSIGNMENT (TOP VIEW)
PIN NAMES
8
NC
NC
NC
NC
NC
RY/BY 2
RY/ BY 1
RE
CE 1
CE 2
NC
VCC
VSS
NC
NC
CLE
ALE
WE
WP
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
TH58NVG4S0HTA20
I/O1 to I/O8
CE 1
CE 2
WE
RE
CLE
ALE
WP
RY/BY 1
RY/BY 2
VCC
VSS
NC
I/O port
Chip enable (Chip A,B)
Chip enable (Chip C,D)
Write enable
Read enable
Command latch enable
Address latch enable
Write protect
Ready/Busy (Chip A,B)
Ready/Busy (Chip C,D)
Power supply
Ground
No Connection
TH58NVG4S0HTA20
8
48 NC
47 NC
46 NC
45 NC
44 I/O8
43 I/O7
42 I/O6
41 I/O5
40 NC
39 NC
38 NC
37 VCC
36 VSS
35 NC
34 NC
33 NC
32 I/O4
31 I/O3
30 I/O2
29 I/O1
28 NC
27 NC
26 NC
25 NC
2 2016-06-30C







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)