STATIC RAM. TC518129AFTL-10LV Datasheet

TC518129AFTL-10LV RAM. Datasheet pdf. Equivalent


Part TC518129AFTL-10LV
Description SILICON GATE CMOS PSEUDO STATIC RAM
Feature TOSHIBA TC5I8I29APLIAFLIAFWL-80LVII0LVI I2LV TC5I8I29AF1L-80LVII0LVI I2LV SILICON GATE CMOS 131,07.
Manufacture Toshiba
Datasheet
Download TC518129AFTL-10LV Datasheet


TOSHIBA TC5I8I29APLIAFLIAFWL-80LVII0LVI I2LV TC5I8I29AF1L-8 TC518129AFTL-10LV Datasheet
Recommendation Recommendation Datasheet TC518129AFTL-10LV Datasheet




TC518129AFTL-10LV
TOSHIBA
TC5I8I29APLIAFLIAFWL-80LVII0LVI I2LV
TC5I8I29AF1L-80LVII0LVI I2LV
SILICON GATE CMOS
131,072 WORD x 8 BIT CMOS PSEUDO STATIC RAM
Description
The TC518129A-LV is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. The TC518129A-LV
utilizes a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high speed and low power
storage. The TC518129A-LV operates from a single power supply of 3.135V - 5.5V Refreshing is supported by a refresh (RFSro
input which enables two types of refreshing - auto refresh and self refresh. The TC518129A-LV features a static RAM-like interface
with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microproces-
sor interface.
A CS standby mode interface is incorporated in the TC518129A-LV family, with the CE2 pin in the TC518128A-LV family changed
to a CS pin. The TC518129A-LV is available in a 32-pin, 0.6 inch width plastic DIP, a small outline plastic flat package, and a 32-pin
thin small outline plastic package (forward type).
Features
• Organization:
131,072 words x 8 bits
• Low voltage operation:
3.135V - 5.5V
• Data retention supply voltage: 3.0V - 5.5V
• Fast access time
TC518129A-LV Family
-80 -10 -12
tCEA'CE Access Time
toEA OE Access Time
tRC Cycle Time
Power Dissipation
Is.sV
Self Refresh Current
1 3.0V
80ns
3Sns
130ns
38SmW
100ns
40ns
160ns
330mW
200~
100~
120ns
SOns
190ns
27SmW
• Auto refresh is supported by an intemal refresh address counter
• Self refresh is supported by an internal timer
• Inputs and outputs TIL compatible
• Refresh: 512 refresh cycles/8ms
• Auto refresh power down feature
• Package
- TC518129APL: DIP32-P-600
- TC518129AFL: SOP32-P-450
- TC518129AFWL: SOP32-P-525
- TC518129AFTL: TSOP32-P-0820
Pin Connection (Top View)
RFSH
A16
A14
Al2
A7
A6
AS
A4
A3
A2
Al
AO
1/01
1/02
1103
GND
Voo
AIS
CS
R/IN
All
A8
A9
Al'
OE
Al0
CE
1108
1107
1106
1/05
1104
res I 8129APL I AFL I AFWL
TCS18129AFTL ( Forward)
Pin Names
AO -A16
R!W
OE
RJ!SR
'CE
CS
1/01 - 1/08
Voo
GND
Address Inputs
Read/Write Control Input
Output Enable Input
Refresh Input
Chip Enable Input
Chip Select Input
Data InputslOutputs
Power
Ground
(TSOP)
PIN NO.
1
2
3 4S6 7 8
9 10 11 12 13 14 1S 16
PIN NAME A11 Ag As A13 R!W CS A15 Voo RJ!SR A16 A14 A12 A7 As A5 A4
PIN NO. 17 18 19 20 21 22 23 24 2S 26 27 28 29 30 31 32
PIN NAME A3 A2 A1 Ao 1/01 1/02 1/03 GND 1/04 I/OS 1/06 1/07 1/08 'CE A10 OE
TOSHIBA AMERICA ELECTRONIC COMPONENTS. INC.
0-101



TC518129AFTL-10LV
TC518129APLlAFL/AFWLlAFTL·80LV/10LV/12LV Static RAM
Block Diagram
ROW
ADDRESS
BUFFER (9)
CE
CS
MEMORY
ARRAY
512)(256)(8
R/Wo---oQ
Operating Mode
~NMOOE
CE CS OE R/W RFSH AO -A16 1/01 - 8
Read
Write
cr only Refresh
CS Standby
Auto/Self Refresh
Standby
LHL H *
LH * L *
LHH H *
LL * * *
H* * * L
H* * * H
V* OUT
V* IN
V* HZ
* HZ
* HZ
* HZ
H = High level input (VIH)
L =Low level input (VII)
* = VIH orVIL
V* = At the falling edge of CE, all address inputs are latched. At all other times, the address inputs are" *".
HZ = High impedance
Maximum Ratings
SYMBOL
ITEM
VIN Input Voltage
VOUT Output Voltage
Voo Power Supply Voltage
TOPR Operating Temperature
TSTRG Storage Temperature
TSOLOER Soldering Temperature • Time
Po Power DisSipation
lOUT Short Circuit Output Current
RATING
-1.0 -7.0
-1.0 -7.0
-1.0 -7.0
0-70
-55 - 150
260·10
600
50
UNIT
V
V
V
°C
°C
°C· sec
mW
mA
NOTES
1
0·102
TOSHIBA AMERICA ELECTRONIC CDMPDNENTS•.INC.







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