Static RAM. CDM62256 Datasheet

CDM62256 RAM. Datasheet pdf. Equivalent


GE CDM62256
Random-Access Memories (RAMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
CDM62256
A" 28 VDD
A12
A7
A.
A'
.,A••"
A'
Aa ,a
..•• A.27 iVl
A13
..•• A."'
22 Of
.,.21 "a
'a IT
1/08
1/01
"1/02
"1103
13
'"Vss
,,1..7
TOP VI EW
1/07
1106
I/O'
1/04
,zcs- 571091111
TERMINAL ASSIGNMENT
CMOS 32,768-Word by 8-Bit
LSI Static RAM
Features:
• Fully static operation
• Single power supply: 4.5 V to 5.5 V
All Inputs and outputs directly TTL
compatible
• Industry standard 28-pin
configuration
• Input address buffers gated off
with chip disable
• Low standby and operating power:
10081 = 2 pA typical, 100A = 70 mA
maximum
• 3-state outputs
• Extended operating temperature range
The RCA-CDM62256 is a 32,768-word by 8-blt static
random-Bccess memory. It Is designed for use in memory
systems where high-speed, low power and simplicity in use
are desirable. This device has common data input and data
output and utilizes a single power supply of 4.5 V to 5.5 V.
Chip Enable (CE) gates the address and output buffers and
powers down the chip to the low power standby mode. The
output enable (OE) controls the output buffers to eliminate
bus contention.
The CDM62256-10 has an operating temperature range of
O· to +70·C. The CDM62256-101 and CDM62256-121 have
an operating temperature range of -40· to +85· C.
The CDM62256 Is supplied In 28-lead, hermetic, dual-In-
line, side-brazed ceramiC packages (D suffix), in 28-lead
dual-in-line plastic packages (E suffix), and In chip form (H
suffix).
CDM62256-10
CD M62256-1 01
CDM62256-121
Access Time (max.)
Output Enable Time (max.)
Operating Current (max.)
Standby Current
looe, (max.)
100 ns
50 ns
70 mA
100pA
100 ns
50 ns
70mA
200pA
120 ns
60 ns
70mA
200pA
Operating Temp. Range
O· to +70·C
-40· to +85· C
Data Retention Voltage:
O· :5 TA:5 +7.0· C
2V min.
-
-
O· :5TA:5 +85·C
-
2Vmin.
2V min.
-40· < TA < O·C
- 4.5 V min.
4.5 V min.
RECOMMENDED DC OPERATING CONDITIONS at TA = 0 to +70·C (CDM62256-10); TA = _40· to +85·C (CM62256-10I,
CDM62258-121) For maximum reliability, operating condition••hould be .elected .0 that operation 18 alway. within the
following range.:
CHARACTERISTIC
DC Operating Voltage Range
Input Voltage Range
A Min V,L = -1.0 V for pulse wldth:5 50 ns
MIN.
LIMITS
TYP.
MAX.
UNITS
Voo 4.5
V'H 2.2
V,L -0.3 A
5 5.5
3.5 Voo +0.3
0 0.8
V
File Number 1845
648 ______________________________________________________________


CDM62256 Datasheet
Recommendation CDM62256 Datasheet
Part CDM62256
Description CMOS 32768-Word by 8-Bit LSI Static RAM
Feature CDM62256; Random-Access Memories (RAMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ CDM62256 A" 28 VDD A12 A7 .
Manufacture GE
Datasheet
Download CDM62256 Datasheet




GE CDM62256
______________________Random-Acce.. Memories (RAMs)
CDM62256
MAXIMUM RATINGS, Absolute-Maximum Values
• DC SUPPLY-VOLTAGE RANGE, (Voo): " ...•...•..••..•.•.•....••..•..••..•••••..••.. , ................. , •• , ... , ....... -0.5 to +7 V
• INPUT VOLTAGE RANGE, (V,N) .................................................................................... -0.5" to +7 V
• INPUT/OUTPUT VOLTAGE RANGE (V,,,,) ..................................................................... -0.5" to,Voo +0.3 V
POWER DISSIPATION PER PACKAGE (Po):
For T. = -40· to +75· C (PACKAGE TYPE e) ............................................................................500 mW
ForT. = +75· to +85·C (PACKAGE TYPE E) ............................................... Derate Linearly at 8 mW/·C to 420 mW
For T. = -40· to +85·C (PACKAGE TYPE D) ............................................................................ 500 mW
DEVICE DISSIPATION PER OUTPUT TRANSISTOR
ForT. = FULL PACKAGE-TEMPERATURE RANGE ..................................................................... 100 mW
OPERATING-TEMPERATURE RANGE (T.)
CDM62256-10 (PACKAGE TYPES 0 AND E) ........................................................................ 0 to +70·C
CDM62256-101, 121 (PACKAGE TYPES 0 AND E) ................................................................. -40· to +85·C
STORAGE TEMPERATURE RANGE (T"") ......................................................................... _55· to +150·C
LEAD TEMPERATURE (DURING SOLDERING)'
At distance 1/16 ± 1132 in. (1.59 ± 0.79 mm) from case for 10 s max..................................................... +285·C
• (Voltage referenced to V•• terminal)
.. Min V'N, V,'" = -1 V for pulse width :$ 50 ns
TRUTH TABLE
-
CE OE WE
H
L
L
L
L = Low,
X
X
L
H
H = High, X = H or L
X
L
H
H
AO toA14
X
Stable
Stable
Stable
DATA 1/0
HI-Z
D,N
Dour
Hi-Z
MODE
Standby
Wllte
Read
Output disable
DEVICE
CURRENT
IDDS
IDDA
IDDA
IDDA
AO
Al
A2
A3
A4
A5
A6
A7
A8
A9
Al0
Al1
A12
A13
A14
AOORESS
BUFFER
x MEMORY CELL
ARRAY
512 .. 64.8
PI
~TOA14
Mi
2!i
CE
IIOITOI
VDD
VSS
ADDRESS INPUT
WRITE ENABLE
OUTPUT ENABLE
CHIP ENABLE
DATA 1/0
POWER SUPPLV (5 V)
POWER SUPPLV (0 V)
1/01 1102 1103 V04 1105 VOS 1007 1108
192CM-<10335R1
Fig. 1 - Functional block diagram.
_____________________________________________________________ M9



GE CDM62256
Random-Acce88Memo~es(RAM~ _________________________________________
CDM62256
ELECTRICAL CHARACTERISTICS at T. = 0° to +70°C (CDM62256-10); TA = _40° to +85°C (CDM62256-101,
CDM82258-121); Voo = 5 V ± 10"10, except a. noted.
DC Electrical Characterlltlc.
LIMITS
CHARACTERISTIC
TEST CONDITIONS
CDM62256-10
CDM62256-101
CDM62256-121
UNITS
Input Leakage
Standby Supply
Current
Average Operating
Current
Operating Supply
Current
Output Leakage
ILl
loos
IODS1
IDOA
1000
ico
High Level Output
Voltage
Low Level Output
Voltage
VOH
VOL
MIN. TYP." MAX. MIN. TYP." MAX. MIN. TYP." MAX.
V, = 0 to Voo
CE = V,H
CE ~ Voo-O.2 V
-1 -
1 -1 -
1 -1 -
1
- 1.5 3.0 - 15 3.0 - 1.5 3.0
- 2 100 - 2 200 - 2 200
V, = V'L, V'H
;'0 = 0 mA te" = Min
-
40 70 -
40 70 -
37 70
V, = VIL, V'H
1"0 = 0 mA
- 35 65 - 35 65 - 35 65
CE= V,Hor
WE = V,L Dr OE= V,H -1
-
1 -1 -
1 -1 -
1
V,iO = 0 to Voo
10H = -1.0 mA
2.4 Voo-0.1 -
2.4 Voo-0.1 -
2.4 Voo-0.1 -
10L = 2.1 mA
- 0.2 0.4 - 0.2 0.4 - 0.2 0.4
• Typical values are measured at T. = 25°C and Voo = 50 V
= =Terminal Capacitance (f 1 MHz, TA 25°C)
pA
mA
pA
mA
mA
pA
V
V
CHARACTERISTIC
TEST CONDITIONS
Address Capacitance
Input Capacitance
1/0 Terminal Capacitance
CAOO
C,
CliO
VAOO = 0 V
V, = OV
Vila = 0 V
MIN.
-
-
-
LIMITS
TYP.
-
-
-
MAX.
10
10
10
UNITS
pF
pF
pF
SIGNAL DESCRIPTIONS
AO-A14 (Address Inputs): These inputs must be stable prior
to a write operation. but may change asynchronously
during read operations.
1/01-1/08: 8-bit 3-state data bus.
CE (Chip Enable): Powers down chip, disables Read and
Write functions, and gates off address inputs.
OE (Output Enable)' Enables 3-state outputs If CE is low
and ~ is high.
WE (Write Enable)' Enables Write function, if CE is low WE
will dominate If both WE and OE are low (i.e., the bus Will be
3-stated and a Write will occur).
Voo, Vss: Power supply connections.
650 _______________________________________________________________







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