Static ROM. CDM53128 Datasheet

CDM53128 ROM. Datasheet pdf. Equivalent


GE CDM53128
Read-Only Memories (ROMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
CDM53128
NC
.A12
A7
A'
A'
A>
A2
26 Voo
27 ru/CE2
2. AI3
25 A8
2. A.
" All
22 QE/OE
21 AID
AI 20 m/CE1
AD 10
19 07
"00
01 12
18 a.
O.
02 13
I. o.
Vss 15 a'
"
TOP VIEW
TERMINAL ASSIGNMENT
CMOS 16,384-Word by 8-Bit
LSI Static ROM
Features:
• Asynchronous operation
• Fast access time - 250 ns max.
• Low standby and operating power -
158Y2=2 pA typical
IOPER2=10 mA max. at tcyc=1 ps;
=30 mA max. at tcyc=250 ns
• Automatic power-down
• Mask-programmable chip enables
and output enable
• TTL input and output compatIble
• 28-pin JEDEC standard pin out
The RCA-COM53128 is a 131 ,072-bit asynchronous mask-
programmable CMOS REAO-ONL Y memory organized as
16,384 eight-bit words. The COM53128 is designed to be
used with a wide range of general-purpose microprocessor
systems, including the RCA COP1800 series system. Two
chip-enable inputs and an output enable function are
provided for memory expansion and output buffer control.
Either chip enable (CE1 or CE2) can gate the address and
output buffers and power down the chip to the standby
mode. The output enable (OE) controls the output buffers
to eliminate bus contention. The polarity of each chip
enable and the output enable are user mask-programmable.
The COM53128 is supplied in 28-lead, hermetic, dual-in-
line sLde-braze<L~elamic (0 suff.!&.. and in 28~jeaddual~
in-line plastic (E suffix) packages.
AI3--
I
A3 --1--1
A2 --1--1
AI
'a":
'o"
:3
'o"
..'''g0""":
AD ---I--r-~-'-+-4--r-+---"
ACTIVITY
DETECTOR
IAUTO POWERI
DOWN
131,072 BIT
ROM
CELL ARRAY
-**OEIOE ---------~
* MASK PROGRAMMABLE AS'
ACTIVE - HIGH OR ACTI VE- LOW OR DON'T CARE
** MASK PROGRAMMABLE AS
ACTIVE- HIGH OR ACTIVE LOW
QO 01
02 03
Fig. 1 - Functional block dIagram.
04 05 06 07
S2CM-36239
File Number 1454
718 _________________________________________________________________


CDM53128 Datasheet
Recommendation CDM53128 Datasheet
Part CDM53128
Description CMOS 16384-Word by 8-Bit LSI Static ROM
Feature CDM53128; Read-Only Memories (ROMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ CDM53128 NC .A12 A7 A' •A' A> .
Manufacture GE
Datasheet
Download CDM53128 Datasheet




GE CDM53128
Read-Only Memorle. (ROMs)
CDM53128
MAXIMUM RATINGS, Absolute-Maximum Values:
DC SUPPLY-VOLTAGE RANGE. (Voo)
(Voltage referenced to Vss terminal) .......................................•............•............... -0.5 to +7 V
INPUT VOLTAGE RANGE. ALL INPUTS ...................................•......••............... -0.5 to Voo +0.5 V
DC INPUT CURRENT. ANY ONE INPUT ..•.•............•................. '" .............................. ±10 mA
POWER DISSIPATION PER PACKAGE (Po):
For TA= -40 to +60° C (PACKAGE TYPE E) ..................................................•........... 500 mW
ForTA = +60 to +85°C (PACKAGE TYPE E) ..........•...................... Derate Linearly at 8 mW/oC to 300 mW
ForTA=-55to+100°C(PACKAGETYPED) .••...............•.•...•...........•.•...................... 500mW
For TA = +100 to +125°C (PACKAGE TYPE D) ............................... Derate Linearly at 8 mW/oC to 300 mW
DEVICE DISSIPATION PER OUTPUT TRANSISTOR
For TA = FULL PACKAGE-TEMPERATURE RANGE (All Package Types) ............•.................••.... 100 mW
OPERATING-TEMPERATURE RANGE (TA):
PACKAGE TYPE 0 ............•....•.......................•................•...•........•....... -55 to +125°C
PACKAGE TYPE E ..•••.•..•..........................................•••.........•..........•.•.• -40 to +85°C
STORAGE-TEMPERATURE RANGE (T...) ....•..••............... : .................................... -65 to +150°C
LEAD TEMPERATURE (DURING SOLDERING):
At distance 1/16 ± 1/32 in. (1.59 ± 0.79 mm) from case for 10 s maximum ................................•... +265°C
STATIC ELECTRICAL CHARACTERISTICS at TA = -4010 +85°C, Voo = 5 V ± 10"10, Except as noted
CHARACTERISTIC
CONDITIONS
LIMITS
ALL TYPES
UNITS
Average Operating Device Current-
10PEA,d
IOPER2e
DC Active Device CurrentD
Standby Device CurrentC
IAcT1 d
IACT.e
ISBy,d
ISBy.e
Output Voltage Low-Level
Output Voltage High-Level
Input Low Voltage
Input High Voltage
Input Leakage Current (Any Input)
3-State Output Leakage Current
Input Capacitance
Output Capacitance
VOL
VOH
V'L
V,H
l,N
lOUT
C'N
COUT
"TYPIcal values are for TA=25°C and nominal Vee.
-Address inputs toggling. chip enabled, outputs open circuit.
b Inputs stable, chip enabled, outputs open circuit.
Min. Typ." Max.
V'N = V,L. V,H; CE1 and CE2=
V,H; (CE1 and CE2 = V,c!
tc,c = 1 /AS
tc,c = 250 ns
V'N = 0.2 V. Voo -0.2 V;
CE1 & CE2 = Voo -0.2 V;
(~ & !5E2=0.2 V) tcyc=1 IJ!
tcyc = 250 ns
V'N - V,L. V,H; CE1 and CE2
V,H; (CE1 and~ = V,c!
V'N - 0.2 V. Voo -0.2 V;
CE1 & CE2=Voo -0.2 V;
(CE1 & CE2 = 0.2 VI
V'N = V,L. V,H; CE1 or CE2
V,L; (CE1 or CE2=V,HI
-
-
-
-
-
-
-
- 15
- 35 mA
5 10
15 30
- 15 mA
- 50 pA
- 3 mA
V'N = 0.2 V. Voo -0.2 V;
CE1 or CE2 = 0.2 V;
- 2 50 pA
(CE1 or CE2 = Voo -0.2 V)
10L 3.2mA
0.4
10H - 3.2 mA
2.4
0.8 V
2.2
Vss $ V'N $ Voo
VSS $ VOUT $ Voo
±1 pA
±1
f - 1 MHz. TA - 25°C
f= 1 MHz. TA=25°C
5
6
10
pF
12
Clndependent of address Input actiVIty, chIp disabled.
li-rTL inputs.
r
.CMOS inputs.
________________________________ _~-------------------------- __ 719



GE CDM53128
Read-Only Memories (ROMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
CDM53128
RECOMMENDED OPERATING CONDITIONS atTA = -40 to +85°C
For maximum reliability, nominal operating conditions Ihould be selected 80 that operation II always within the
following rangel:
CHARACTERISTIC
DC Operating Voltage Range
Input Voltage Range
LIMITS
Min.
Max.
46
Vss Voo
UNITS
V
DYNAMIC ELECTRICAL CHARACTERISTICS at TA=-40 to +85° C, Voo =5 V ± 10%,
Input t" t. = 10 nl; CL = 100 pF, and 1 TTL Load; Input Pulse Levels: 0.8 V to 2.2 V
CHARACTERISTIC
Address Access Time
Chip Enable to Output Active
Output Enable to Output Active
Chip Enable Access
Output Enable to Output Valid
Data Hold After Address
Chip Disable to Output High Z
Output Disable to Output High Z
Cycle Time
tAvav
tEvax
tGvax
tEvav
tGvav
tAxax
tExaz
taxaz
tCYC
LIMITS
Min.
Max.
- 250
0-
0-
- 250
- 90
10 -
- 90
- 70
250 -
UNITS
ns
['='" l~
AO-A----."
CEIICl! ,cE2Iffi
OE/l5'E
OATA OUT ---------t----~~~~=====1~
NOTES'
(1) Assume. tGVQY & tEVOV
are ..1I.ltled.
(2) Output Active requires
both Chip Enables &
Output Enable Active.
(3) Assumes IAVOV & tGVQY
are ,,11,fled.
(4) A.sum•• IAVOV & tEVQY
Ire ..11.ned.
(5) Either Invalid Chip Enable
or Output Enable
eau... Output High Z.
(6) Generates 10 ns Valid
Output Pulse. (I.e.• ICYC-1AVOV+IAXQX)
NOTE: TIMING MEASUREMENT REFERENCE LEVEL IS 1.5 V.
92CM-36407A1
Fig. 2 - Timmg wavefotms.
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