Read-Only Memory. CDP1831C Datasheet

CDP1831C Memory. Datasheet pdf. Equivalent


GE CDP1831C
Read-Only Memorle. (ROM.) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
CDP1831, CDP1831C
MA7
MA6
MA5
MA4
MA3
MA2
MAl
MAO
BUSO
BUSI
BUS2
vss
I 24
p 23
3 22
4 21
5 20
6 19
7 18
~ 17
9 16
10 15
II 14
12 13
TOP VIEW
Voo
TPA
NC
CSI
CS2
1m!
CEO
BUS7
BUSS
BUS5
BUS4
BUS3
NC • NO CONNECTION
92CS-27584R2
Terminal Assignment
512-Word X 8-Bit Static
Read-Only Memory
Features:
• Compatible with CDP1800 and CD4000-series devices
• On-chip address latch
• Interfaces with CDP1802 microprocessor without
additional components
• Optional programmable location within 64K
memory space
• Three-state outputs
Product Preview
The RCA-COP 1831 and COP1831C types
are 4096-bit mask-programmable CMOS
read-only memories organized as 512
words x 8 bits and are com pletely static; no
clocks required. They will directly interface
with COP1800-series micro-processors
without additional components.
The COP1831 and COP1831C respond to
16-bit address multiplexed on 8 address
lines. Address latches are provided on-chip
to store the 8 most significant bits of the
16-bit address. By mask option, this ROM
can be programmed to operate in any 512-
word block within 64K memory space. The
polarity of the high address strobe (TPA),
and CS1 and CS2 are user mask-program-
The Chip-Enable output Signal (CEO) goes
"high" when the device is selected, and is
intended for use an an output disable con-
trol for RAM memory in a microprocessor
system.
The COP 1831C is functionally identical to
the COP1831. The COP1831 has an operat-
ing voltage range of 4 to 10.5 volts, and the
COP1831 C has an operating voltage range
of 4 to 6.5 volts.
The COP1831 and COP1831C types are
supplied in 24-lead hermetic dual-ln-Iine,
side-brazed ceramic packages (0 suffix)
and in 24-lead dual-In-line plastic packages
(E suffix). The COP1831C Is also available
In chip form (H suffix).
BUS7
BUS6
BUS5
BUS4
BUS3
BUS2
BUSI
BUSO
f!!!-----''---.... CEO
Fig. 1 - Functional diagram.
92CS-21~81R3
File Number 1104
728 _________________________________________________________


CDP1831C Datasheet
Recommendation CDP1831C Datasheet
Part CDP1831C
Description 512-Word x 8-Bit Static Read-Only Memory
Feature CDP1831C; Read-Only Memorle. (ROM.) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ CDP1831, CDP1831C MA7 MA6 MA5 M.
Manufacture GE
Datasheet
Download CDP1831C Datasheet




GE CDP1831C
Read-Only Memories (ROMs)
CDP1831, CDP1831C
MAXIMUM RATINGS, Absolute-Maximum Values:
DC SUPPLY-VOLTAGE RANGE, (Voo)
(All voltage values referenced to Vss terminal)
CDP1831 ..................................................................... -0.5 to + 11 V
CDPI831C ..................................................................... -05 to +7 V
INPUT VOLTAGE RANGE, ALL INPUTS.................
. .-0.5 to Voo +0 5 V
DC INPUT CURRENT, ANY ONE INPUT ................................................. ± 10 mA
POWER DISSIPATION PER PACKAGE (Po):
For TA = -40 to +60'C (PACKAGE TYPE E) ........................................... 500 mW
For TA = +60 to +85'C (PACKAGE TYPE E) ............ Derate Linearly at 12 mW/'C to 200 mW
For TA = -55 to + 100'C (PACKAGE TYPE D) .......................................... 500 mW
For T. = +100 to + 125'C (PACKAGE TYPE D) ......... Derate Linearly at 12 mWI'C to 200 mW
DEVICE DISSIPATION PER OUTPUT TRANSISTOR
FOR TA = FULL PACKAGE-TEMPERATURE RANGE ................................... 100 mW
OPERATING-TEMPERATURE RANGE (T.)
PACKAGE TYPE 0 ............................................................. -55 to + 125'C
PACKAGE TYPE E .............................................................. -40 to +B5'C
STORAGE TEMPERATURE RANGE (T".) ......................................... -65 to + 150'C
LEAD TEMPERATURE (DURING SOLDERING)
At distance 1/16 ± 1/32 inch (1 59 ± 0 79 mm) from case for 10 s max ................... +265'C
OPERATING CONDITIONS at TA = Full Package-Temperature Range. For maximum reliability,
operating conditions should be selected so that operation is always within the following ranges'
CHARACTERISTIC
DC Operating Voltage Range
Input Voltage Range
LIMITS
CDP1831
CDP1831C
Min, Max, Min, I Max.
I4 10.5 4
6.5
IVss Voo Vss Voo
UNITS
V
STATIC ELECTRICAL CHARACTERISTICS at TA = -40 to +85'C Except as noted
CONDITIONS
LIMITS
CHARACTERISTIC Vo V,N Voo
CDP1831
CDP1831C UNITS
QUiescent DeVice
Current, 100
(V) (V) (V) Min. Typ." Max. Min. Typ." Max.
- 5 5 - 0.01 50 - 0.02 200
- 10 10 -
1 200 - -
-
IlA
Output Low Drive
0.4 0,5 5
(Sink) Current, 10L 0.5 0,10 10
0.55
1.30
-
-
- 0.55 -
-- -
-
-
Output High Drive
(Source) Current, 4.6 0,5 5 -0.35 -
- 0.35 -
-
mA
iOH
9.5 0,10 10 -0.65 -
--
-
-
Output Voltage
Low-Level, VOL
Output Voltage
High Level, VOH
Input Low Voltage,
V'L
Input High Voltage,
V,H
- 0,5
- 0,10
- 0,5
- 0,10
0.5,4.5 -
1,9 -
0.5,4.5 -
1,9 -
5
10
5
10
5
10
5
10
-
-
4.9
9.9
-
-
3.5
7
0 0.1 -
0
0 0.1 - -
5 - 49 5
10 - -
-
- 1.5 - -
- 3- -
- - 3.5 -
- -- -
0.1
-
-
-
1.5
-
-
-
V
Input Leakage
Current, liN
Any 0,5 5 - ±10 ±1 - - ±1
Input 0,10 10 -
±10 ±2 -
-
-
mA
3-State Output
Leakage Current, 0,5 0,5 5 - ±10-4 ±1 - - ±1
lOUT
0,10 0,10 10 -
±10 4 ±2 -
-
-
Input
Capacitance, C,n -
--
-
5 7.5 -
5 7.5 pF
Output
Capacitance, Coul -
--
-
10 15 -
10 15
Operating Current, -
0,5 5
-
loo,t
- 0,10 10
-
5 10 -
5 10 mA
10 20 -
-
-
'TYPical values are for "one" T. = 25' C
and nominal Voo
tOutputs open-circuited, cycle time - 2 5 /1s
_________________________________________________________________ 727



GE CDP1831C
Read-Only Memories (ROMs) "'--_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
CDP1831, CDP1831C
DYNAMIC ELECTRICAL CHARACTERISTICS at TA = -40 to +85·C, Voo ±5%,
Input t" t, = 10 ns, CL = 50 pF, RL = 200kO
TEST
LIMITS
CONDITIONS
CDP1831
CDP1831C
CHARACTERISTIC
Access Time from
Address Change,
tAA
Voo UNITS
(V) Mln,t Typ.· Max. Mln.t Typ.· Max.
5 - 850 1000 - 850 1000
-10 350 400 - - -
Access Time from
Chip Select,
5 - 700 800 - 700 800
tACS
Chip Select Delay,
tcs
Address Setup Time,
t.s
Address Hold Time,
tAH
Read Delay, tMRO
10 - 250 300 - - -
- -5 - 600
- 600
- -10
200 300 -
-
-5 50 - - 50 -
10 25 - - - - -
- -5 150 -
150 - ns
-10 75
- -- -
-5
300 500 -
300 500
10 - -100 150 - -
Chip Enable Output
Delay from Address,
tCA
5
10
- 500 600 -
500 600
- 200 250 - - -
Bus Contention Delay,
to
TPA Pulse Width,
tPAW
5
10
5
10
- 200 350 - 200 350
- -100 150 - -
200 -
- 200 -
-
70 - - - - -
tTlme required by a limit device to allow for the indicated function.
'Time required by a tYPical device to allow for the Indicated function Typical values are for
T. = 25· C and nominal VDD
JI\.MA
HIGH ORDER
LOW ORDER
ADDRESS BYTE
ADDRESS BYTE
~'A~ r----'AA
bAH
'PA
TPA
·1,l'
~ 'm
t----'ACo
CS
i--'cs-
HIGH IMPEDANCE
BUS
--1:'0-
--~~'CA
CEO
OUTPUT
ACTIVE
I
VALID DATA
I
-92CM 31039R2
Fig. 2 - Timing waveforms.
728 _________________________________________________________________







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