STATIC RAM. UPD421-5 Datasheet

UPD421-5 RAM. Datasheet pdf. Equivalent

UPD421-5 Datasheet
Recommendation UPD421-5 Datasheet
Part UPD421-5
Description 8K BIT STATIC RAM
Feature UPD421-5; NEe Microcomputers, Inc. NEe fL PD421 J.L PD421-1 fL PD421-2 fL PD421-3 J.L PD421-5 8K BIT STATIC .
Manufacture NEC
Datasheet
Download UPD421-5 Datasheet




NEC UPD421-5
NEe Microcomputers, Inc.
NEe
fL PD421
J.L PD421-1
fL PD421-2
fL PD421-3
J.L PD421-5
8K BIT STATIC RAM
DESCR IPTION
The NEC MPD421 is a very high speed 8192 bit static Random Access Memory organ-
ized as 1024 words by 8 bits. Features include a power down mode controlled by the
chip select input for an 80% power saving.
FEATURES
1024x8-bitOrganization
• Very Fast Access Time: 150/200/250/300/450 ns
• Single +5V Power Supply
• Low Power Standby Mode
• N-Channel Silicon Gate Process
• Fully TTL Compatible
• 6-Device Static Cell
• Three State Common I/O
• Compatible with 8108 and Equivalent Devices
• Available in 22 Pin Ceramic Dual-in-Line Package
11
PIN CONFIGURATION
A6
22 Vee
As 2
21 A7
A4 3
A3 4
AS
19 A9
A2 5 MPD lS Cs
A1 6
421 17 WE
AO
1/°1
1/°2
1/°3
GND
7
S
9
10
11
16 I/OS
15 1/°7
14 1/°6
13 1/°5
12 1/°4
PIN NAMES
AO-Ag
Address Inputs
WE Write Enable
es Chip Select
1/0,-1/08 Data Input Output
VCC
Power (+5V)
GND
Ground
77



NEC UPD421-5
~PD421
A3
A4
A5
AS
A7
AS
Ag
110,
1/°2
1/°3
1/°4
1/°5
I/OS
1/°7
IIOS
MEMORY ARRAY
,2S ROWS
64 COLUMNS
INPUT
OATA
CONTROL
BLOCK DIAGRAM
cs-~""-'
WE-!-=t-)-------------------------~
Operating Temperature
Storage Temperature ..
Voltage on Any Pin.
Note: CD With respect to grol!nd.
..... O°C to +70°C ABSOLUTE MAXIMUM
.. -65°C to +150°C RATINGS*
. -0.5 to +7 Volts CD
COMMENT: Stress above those listed under "Absolute Maximum Ratings" may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliabil ity.
Ta = O'C to +70o e; Vee = +5V ± 10%, unless otherwise specified
LIMITS
PARAMETER SYMBOL
UNIT
MIN TYP MAX
Input Load
Current
(All Inputs Pins)
I/O Leakage
Current
Operating
Current
III
ILO
lec
Stand·bv
Current
Input Low
Voltage
Input High
Voltage
Output Low
Voltage
Output High
Voltage
IS8
VIL
VIH
VOL
VOH
-0.3
2.0
2.4
10 pA
50 pA
120 rnA
i
20 rnA
0.8 V
6.0 V
0.4 V
V
TEST CONOITIONS
VIN =0 to +5.5V
Vee''''' Max;
CS =VIL;
Outputs Open
Vee = Min. to Max.
CS = VIH
IOL =4.0mA
IOH = -1 mA
DC CHARACTERISTICS
78



NEC UPD421-5
CAPACITANCE Ta = 25°C; f = 1.0 MHz
PARAMETER SYMBOL
Input/Output
Capacitance
Input Capitance
CliO
CIN
LIMITS
MIN MAX
7
5
UNIT
pF
pF
l'1PD421
TEST CONDITIONS
VI/O = OV
VIN = OV
AC CHARACTERISTICS
Ta = o°c to +70'-C; vcc = +5V ± 10%, unless otherwise specified
PARAMETER
LIMITS
SYMBOL I'PD421
I'PD421·1 I'PD421·2 I'PD421·3 I'PD421-5 UNIT
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
READ CYCLE
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Hold from Addre••
Change
Chip Selection To Output
in LowZ
Chip Deselection to
Output in High Z
Chip Selection to Power
UpTime
Chip Oeselection to Power
DownTime
tRC
tAA
tACS
tOH
tLZ
tHZ
tpu
tpoCD
450 300
450 300
450 300
10 10
250
250
250
10
200
10
150
200 150
200 150
10
10 10
10 10
10
0 100
0 80
0 70
0 60
0 50
00
00 0
100 80 70
60 50
ns
ns
ns
ns
ns
ns
ns
ns
WRITE CYCLE
Write Cycle Time
Chip Selection to End of
Write
Address Valid to End of
Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid to End of Write
Data Hold Time
Write Enabled to Output in
High Z
Output Active from End of
Write
twc
tcw
tAW
tAS
twp
tWR
tow
tOH
twz
tow
450 300
360 240
250 200
200 160
150
130
ns
ns
360 240
200 160 130
ns
10 10
300 230
10 10
200 150
10 10
100
10 10
190 160
10 10
120 100
10 10
80 70
10
130
10
80
10
60
50
ns
ns
ns
ns
ns
ns
10 10
10 10
10 ns
Note: CD ICC (t = tPO) = 1/2 ICC Active.
79







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